Quasi Delay Insensitive FIFOs: Design Choices Exploration and Comparison

Rodolfo, Taciano A.; Sartori, M.; Moreira, Matheus T.; Calazans, Ney

doi:10.1109/iscas51556.2021.9401566

Cited by 1 publication

(1 citation statement)

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“…The latter reduces the crossed timing dependence between data and control lines, and the number of implied relative timing constraints to solve. Demonstrations, even if partial, that the advantage takes place in practical circuits designed with Pulsar is available in previously published work, including [5], [6], [30], [31].…”

Section: B the Channel Multiplexermentioning

confidence: 99%

Components to Support Choice in Self-Timed Asynchronous Design Flows

Sartori

Nunes

Calazans

2023

JICS

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The design of digital circuits on recent technologies brings several challenges, among which robustness to variations stands out. Variation sources are multiple, and the evolution of integrated circuit fabrication techniques increases the number and relevance of such sources, and the complexity of ensuring circuit robustness against them. Some design paradigms naturally counter variations of one or more types. Asynchronous self-timed design is one such paradigm that can provide robustness to process, voltage, temperature, ageing and IR drop variations, to cite some of the main types. This paper proposes an enhancement to the Pulsar environment, a recently proposed open source automated flow for the design of self-timed clockless circuits.The six components proposed here enable describing choices and decisions on the flow of data tokens inside asynchronous circuits.Design capture in Pulsar can then employ these. To implement the abstract (synthesis-enabled) components, the paper also bringsthe proposal of the handshaking mutex, a versatile complex gate that eases the design of probe and arbiter, the two most complex among the new components. Results demonstrate the new version of Pulsar is more powerful than the previous, baseline, version, enabling the design capture and the automated synthesis steps of more complex asynchronous self-timed circuits. They also indicate the handshaking mutex operates correctly, and with a good level of attested fairness.

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