Quasi‐Omnidirectional Ultrathin Silicon Solar Cells Realized by Industrially Compatible Processes

Abstract

Ultrathin crystalline silicon (c‐Si) solar cells provide advantages in reducing the use of c‐Si material and being flexible, but there are several challenges that need to be conquered, such as limited optical absorption, high sensitivity to surface recombination, and complicated fabrication issues. Here, all‐solution‐processed Si nanopyramids (SiNPs) are proposed as the surface texture for ultrathin c‐Si solar cells to solve the light absorption issue, whose preparation process is simple, low‐cost, and industrially compatible. Combining the SiNPs texture with good passivation technique, an efficiency of 15.1% with an open circuit voltage approaching 700 mV is realized on a 37 µm thick c‐Si solar cell. Moreover, both experimental and simulation investigation reveal that the SiNP‐textured ultrathin solar cells have quasi‐omnidirectional light absorption characteristic, showing a potential to produce higher all‐day output power compared with the Si micropyramids textured counterpart. To further reduce the cost of ultrathin c‐Si solar cells, a direct copper metallization is also investigated in replacement of silver metallization, which can result in a comparable efficiency. The present work demonstrates the conventional industrial processes for achieving low‐cost ultrathin c‐Si solar cells.

Very Thin (56 μm) Silicon Heterojunction Solar Cells with an Efficiency of 23.3% and an Open‐Circuit Voltage of 754 mV

“…PV properties of various c‐Si solar cells as a function of c‐Si wafer/absorber thickness, w : a) V OC , b) J SC , c) FF, and d) efficiency. The difference in symbol types indicates the different approaches for preparing the thin c‐Si absorber and the cell architectures: standard slicing or thinning (SHJ cells [ 9,20,31,34,36–40,55–57 ] including heteroback contacts [ 30,32,33,55 ] and other types [ 6,8,9,11,18,58–62 ] ), epitaxially grown c‐Si films, [ 12–20,27 ] SOI, [ 24 ] exfoliated Si films, [ 19 ] and polycrystalline Si films. [ 25,26 ] The filled symbols represent data for cells which have been independently confirmed.…”

“…Figure 3 shows the PV parameters of c-Si solar cells (η > 15%) reported so far from the viewpoint of the absorber (wafer) thickness, w. For better visibility, we herein plot only several bestefficiency cells in the range of w > 100 μm. The difference in symbol types indicates the different approaches for preparing the thin c-Si absorber and the cell architectures: standard slicing or thinning (SHJ cells [9,20,31,34,[36][37][38][39][40][55][56][57] including heteroback contacts [30,32,33,55] and other types [6,8,9,11,18,[58][59][60][61][62] ), epitaxially grown c-Si films, [12][13][14][15][16][17][18][19][20]27] SOI, [24] exfoliated Si films, [19] and polycrystalline Si films. [25,26] The filled symbols represent data for cells which have been independently confirmed.…”

“…[32] Such a high resistance is expected to be mitigated by modifying the electron/hole contacts and using very fine front metal grids. [9,20,31,34,[36][37][38][39][40][55][56][57] including heteroback contacts [30,32,33,55] and other types [6,8,9,11,18,[58][59][60][61][62] ), epitaxially grown c-Si films, [12][13][14][15][16][17][18][19][20]27] SOI, [24] exfoliated Si films, [19] and polycrystalline Si films. [25,26] The filled symbols represent data for cells which have been independently confirmed.…”

“…Experimentally, thin ( w < 100 μm) and very thin ( w < 70 μm) c‐Si cells have been investigated based on various technologies such as sliced/thinned free‐standing wafers, [ 6–11 ] epitaxially grown Si thin layers, [ 12–20 ] exfoliated Si films, [ 19,21 ] Si on insulator (SOI) wafers, [ 22–24 ] and polycrystalline Si thin films. [ 25,26 ] The first very thin c‐Si cell having η > 20% was demonstrated by Wang et al in 1996, [ 6 ] whereby a 21.5% efficient passivated emitter rear locally diffused (PERL) cell was fabricated using float‐zone (FZ) Si wafers ( w = 47 μm) and thinned by chemical etching.…”

“…It is worth noting that the efficiency limit is dependent on light trapping scheme and numerical simulation has predicted that η > 30% is possible for very thin c-Si cells (15 μm) by applying advanced light trapping using photonic crystals. [4,5] Experimentally, thin (w < 100 μm) and very thin (w < 70 μm) c-Si cells have been investigated based on various technologies such as sliced/thinned free-standing wafers, [6][7][8][9][10][11] epitaxially grown Si thin layers, [12][13][14][15][16][17][18][19][20] exfoliated Si films, [19,21] Si on insulator (SOI) wafers, [22][23][24] and polycrystalline Si thin films. [25,26] The first very thin c-Si cell having η > 20% was demonstrated by Wang et al in 1996, [6] whereby a 21.5% efficient passivated emitter rear locally diffused (PERL) cell was fabricated using float-zone (FZ) Si wafers (w ¼ 47 μm) and thinned by chemical etching.…”