Quaternary Quantum/Reversible Half-Adder, Full-Adder, Parallel Adder and Parallel Adder/Subtractor Circuits

Monfared, Asma Taheri; Haghparast, Majid; Datta, Kamalika

doi:10.1007/s10773-019-04108-5

Cited by 11 publications

(3 citation statements)

References 28 publications

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“…Recently, there have been several explorations into using the higher energy levels such as |2⟩ and |3⟩ to reduce the number of gates required to perform computation. While there are many examples of exploiting this concept of qudits, such as using qutrits (3 logical states) to implement the multi-control Toffoli gate [19,35], implementing higher-radix adders [55], and other applications [28], these use cases are the result of hand optimization, making their general use limited.…”

Section: Introductionmentioning

confidence: 99%

Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures

Litteken

Seifert

Chadwick

et al. 2023

Proceedings of the 50th Annual International Symposium on Computer Architecture

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Superconducting quantum devices are a leading technology for quantum computation, but they suffer from several challenges. Gate errors, coherence errors and a lack of connectivity all contribute to low fidelity results. In particular, connectivity restrictions enforce a gate set that requires three-qubit gates to be decomposed into one-or two-qubit gates. This substantially increases the number of two-qubit gates that need to be executed. However, many quantum devices have access to higher energy levels. We can expand the qubit abstraction of |0⟩ and |1⟩ to a ququart which has access to the |2⟩ and |3⟩ state, but with shorter coherence times. This allows for two qubits to be encoded in one ququart, enabling increased virtual connectivity between physical units from two adjacent qubits to four fully connected qubits. This connectivity scheme allows us to more efficiently execute three-qubit gates natively between two physical devices.We present direct-to-pulse implementations of several threequbit gates, synthesized via optimal control, for compilation of three-qubit gates onto a superconducting-based architecture with access to four-level devices with the first experimental demonstration of four-level ququart gates designed through optimal control. We demonstrate strategies that temporarily use higher level states to perform Toffoli gates and always use higher level states to improve fidelities for quantum circuits. We find that these methods improve expected fidelities with increases of 2x across circuit sizes using intermediate encoding, and increases of 3x for fully-encoded ququart compilation.

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Section: Introductionmentioning

confidence: 99%

Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures

Litteken

Seifert

Chadwick

et al. 2023

Proceedings of the 50th Annual International Symposium on Computer Architecture

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“…Recently, many essential circuits have been presented based on quaternary reversible logic, such as comparators, parallel adders, full adders, half adders, subtractors, and decoders [32], [33], [34], [35], [36], [37], [38], [39], [40].…”

Section: Introductionmentioning

confidence: 99%

Quaternary Reversible Circuit Optimization for Scalable Multiplexer and Demultiplexer

Monfared

Ciriani

Mikkonen³

et al. 2023

IEEE Access

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Information loss is generally related to power consumption. Therefore, reducing information loss is an interesting challenge in designing digital systems. Quaternary reversible circuits have received significant attention due to their low-power design applications and attractive advantages over binary reversible logic. Multiplexer and demultiplexer circuits are crucial parts of computing circuits in ALU, and their efficient design can significantly affect the processors' performance. A new scalable realization of quaternary reversible 4 × 1 multiplexer and 1 × 4 demultiplexer, based on quaternary 1-qudit Shift, 3-qudit Controlled Feynman, and 2-qudit Muthukrishnan-Stroud gates, is presented in this paper. Moreover, the corresponding generalized quaternary reversible n×1 multiplexer and 1×n demultiplexer circuits are proposed. The comparison, with respect to the current literature, shows that the proposed circuits are more efficient in terms of quantum cost, the number of garbage outputs, and the number of constant inputs.

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“…Any combinational logic circuit can be implemented in a binary system using multiplexers and basic logic gates, which is also true for ternary logic [53]. Many quantum ternary circuits implementation for different types of computational units of quantum systems, including full adder, half adder, parallel adder/subtractor, subtractor, multiplier, decoder, encoder, demultiplexer, and multiplexer, can be found in the literature [20][21][22][23][24][25][26][27][28][29][30][31]57]. Decoder, multiplexer, and demultiplexer circuits are major sub-circuits needed for constructing ternary quantum oracles and ternary system designs such as communication systems, computer memory, and arithmetic logic unit [54].…”

Section: Introductionmentioning

confidence: 99%

Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder

Monfared

Ciriani

Kettunen

et al. 2022

Quantum Inf Process

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Designing conventional circuits present many challenges, including minimizing internal power dissipation. An approach to overcoming this problem is utilizing quantum technology, which has attracted significant attention as an alternative to Nanoscale CMOS technology. The reduction of energy dissipation makes quantum circuits an up-and-coming emerging technology. Ternary logic can potentially diminish the quantum circuit width, which is currently a limitation in quantum technologies. Using qutrit instead of qubit could play an essential role in the future of quantum computing. First, we propose two approaches for quantum ternary decoder circuit in this context. Then, we propose a quantum ternary multiplexer and quantum ternary demultiplexer to exploit the constructed quantum ternary decoder circuit. Techniques to achieve lower quantum cost are of importance. We considered two types of circuits, one in which the output states are always restored to the initial input states and the other in which the states of the output are irrelevant. We compare the proposed quantum ternary circuits with their existing counterparts and present the improvements. It is possible to realize the proposed designs using macro-level ternary gates that are based on the ion-trap realizable ternary 2-qutrit Muthukrishnan–Stroud and 1-qutrit permutation gates.

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Quaternary Quantum/Reversible Half-Adder, Full-Adder, Parallel Adder and Parallel Adder/Subtractor Circuits

Cited by 11 publications

References 28 publications

Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures

Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures

Quaternary Reversible Circuit Optimization for Scalable Multiplexer and Demultiplexer

Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder

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