Very recently a new passive circuit element called memristor has been extensively investigated by researchers, which can be used for a variety of applications. This two-terminal device having few nanometer dimensions has been experimentally shown to possess both memory and resistor properties. This has also received great attention due to the fact that these devices can very easily be integrated on CMOS subsystems. Most of the logic design works in this context are based on material implication operation which can be very efficiently implemented using memristors. In this paper we propose an efficient realization of 2-to-1 multiplexer using memristors, and hence present a synthesis methodology that represents a given Boolean function as a Reduced Ordered Binary Decision Diagram (ROBDD) and then maps the same to memristor implementation.
Index Terms-Memristor, logic design, multiplexer, binary decision diagram
Abstract. The development of approaches for synthesis and optimization of reversible circuits received significant attention in the past. This is partly due to the increasing emphasis on low power design methodologies, and partly motivated by recent works in quantum computation. While most of them relied on a gate library composed of multiple-control Toffoli (MCT) gates with positive control lines, some initial works also exist which additionally incorporate negative control lines. This usually leads to smaller circuits with respect to the number of gates as well as the corresponding quantum costs. However, despite these benefits, negative control lines have hardly been considered in post-synthesis optimization of reversible circuits so far. In this paper, we address this issue. We are presenting an optimization scheme inspired by template matching which explicitly makes use of negative control lines. Experimental evaluations demonstrate that exploiting negative control lines in fact lead to a reduction in the number of gates and the quantum costs by up to 60% and 25%, respectively.
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