Abstract. The development of approaches for synthesis and optimization of reversible circuits received significant attention in the past. This is partly due to the increasing emphasis on low power design methodologies, and partly motivated by recent works in quantum computation. While most of them relied on a gate library composed of multiple-control Toffoli (MCT) gates with positive control lines, some initial works also exist which additionally incorporate negative control lines. This usually leads to smaller circuits with respect to the number of gates as well as the corresponding quantum costs. However, despite these benefits, negative control lines have hardly been considered in post-synthesis optimization of reversible circuits so far. In this paper, we address this issue. We are presenting an optimization scheme inspired by template matching which explicitly makes use of negative control lines. Experimental evaluations demonstrate that exploiting negative control lines in fact lead to a reduction in the number of gates and the quantum costs by up to 60% and 25%, respectively.

Reversible circuits are of vital importance in many applications involving low power design. One of the principle areas where reversible circuits play great role is quantum computing. One of the foremost requirements of quantum computation is that it requires all the circuits that are used should be reversible in nature. Reversible circuit is one which maps an individual input vector to a singular output vector. Because of its application in many areas including quantum computing, many synthesis approaches have been developed. In this paper we focus on a synthesis approach which is based on permutation theory and heuristic search. An artificial intelligence based search technique A * is used to find near optimal solutions. Experimental results demonstrate that the proposed approach provides solutions within a very reasonable span of time.

The problem of reversible logic synthesis has drawn the attention of many researchers over the last two decades with growing emphasis on low-power design. Among the various synthesis approaches that have been reported, the ones based on compact circuit representations like Binary Decision Diagrams (BDD) and Exclusive-or Sum-Of-Products (ESOP) are interesting in the sense that they can handle large circuits with more than 100 inputs. The drawback of these approaches, however, is that the generated netlists are sub-optimal, and there is lot of scope for optimizing them. One of the best methods in this regard is an approach, where the ESOP cubes are grouped into sublists based on sharing among more than one outputs. In the work reported in this article, in contrast, an approach based on clustering the ESOP cubes based on their similarity with respect to input variables is presented, along with a technique to map each of the clusters into reversible gate netlists. This approach results in a significant reduction in quantum cost of the final netlist, but requires one additional garbage line. Experimental results on a number of reversible circuit benchmarks have been presented in support of the claim and also demonstrate that the method is very fast.

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