Rapid Annealing of a Polysilicon Stacked Emitter Structure

Natsuaki, N.; Tamura, Masaya; Miyazaki, Takao; Yanagi, Y.

doi:10.7567/ssdm.1983.a-2-7

Cited by 1 publication

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“…19,20) Miyao et al also reported almost the same value (2.3-2.7 eV) for L-SPE. 11) 4.7 eV is rather comparable to those for the epitaxial alignment of polycrystalline silicon, 3.9 eV, 21) and 4.5 eV 22) at high temperatures. Although the average spacing between silicon seeds is very small, that is, 160 nm, the higher activation energy and lower growth speed of L-SPE in this experiment seem quite different from those in previous studies.…”

Section: Resultssupporting

confidence: 59%

Low-Temperature Solid Phase Epitaxial Regrowth of Silicon for Stacked Static Random Memory Application

Lee

Yeo

Yoo

et al. 2011

Jpn. J. Appl. Phys.

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Solid phase epitaxy (SPE) techniques have been studied to realize stacked static random memory (SRAM) devices. Among the candidates including epitaxial lateral overgrowth (ELO) and laser epitaxial growth (LEG) techniques, SPE is the most stable and cost-effective scheme since it is fulfilled by the deposition of amorphous silicon layers and the subsequent low temperature annealing using conventional furnace equipment which has been used for several decades in semiconductor fabrication. We introduced silicon seeds for the epitaxial realignment of amorphous silicon within the contact window by the selective epitaxial growth (SEG) of single-crystalline silicon. The role of process variables associated with channel silicon deposition on SPE was investigated. The efficiency of SPE was quantified by electron back-scatter diffraction (EBSD) measurement, which visualizes the fraction of the <100> orientation in a channel silicon layer. SiH4 ambient during the ramp-up stage in the deposition of amorphous silicon layers showed superior epitaxial realignment to N2 ambient, which was mainly due to the suppression of interfacial layer formation. Electrical characteristics such as on-current distribution and static noise margin indicated SPE to be feasible for high-density stacked SRAM application.

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Section: Resultssupporting

confidence: 59%