RapidIO for radar processing in advanced space systems

Abstract

Space-based radar is a suite of applications that presents many unique system design challenges. In this paper, we investigate use of RapidIO, a new high-performance embedded systems interconnect, in addressing issues associated with the high network bandwidth requirements of real-time ground moving target indicator (GMTI), and synthetic aperture Radar (SAR) applications in satellite systems. Using validated simulation, we study several critical issues related to the RapidIO network and algorithms under study. The results show that RapidIO is a promising platform for space-based radar using emerging technology, providing network bandwidth to enable parallel computation previously unattainable in an embedded satellite system.

Real-time parallel implementation of Pulse-Doppler radar signal processing chain on a massively parallel machine based on multi-core DSP and Serial RapidIO interconnect

“…To our best knowledge, Bueno et al [3,[21][22][23][24][25] works are the closest to our research study. They have worked on the modeling and simulation of a multi-processor system based on multiple ASICs processing nodes interconnect by RapidIO bus.…”

“…Bueno et al [3,[21][22][23][24][25] were interested in using the RapidIO embedded interconnect in system architectures for space-based radar. They have studied two algorithms: ground moving target indicator (GMTI) and synthetic aperture radar (SAR).…”

“…These methods were executed on simulated systems of different sizes and topologies. In [21,23,24], they explored considerations for systems capable of executing both GMTI and SAR in real time on an embedded multi-processor satellite system equipped with a RapidIO interconnection network. In [25], they have studied chip level issues associated with the interfacing of a RapidIO network with reconfigurable processing elements through a shared SDRAM interface.…”

“…Both systems consist of different processing nodes, but both have the same architecture and use RapidIO protocol as an inter-processor communication bus. Also, Bueno et al [3,[21][22][23][24][25] have studied a radar application that has constraints similar to ours in terms of high-processing power and harsh real-time needs. Finally, they have studied a straightforward approach to distribute the radar processing.…”

An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform

“…In light of those considerations, we use SRIO as our backplane transmission protocol [24], and our current testbeds are based on SRIO Gen 2 backplanes. Each PE has a four-lane port connected to an SRIO switch on the MCH.…”