2018
DOI: 10.1109/lcomm.2018.2814985
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Rate-Adaptive Protograph LDPC Codes for Multi-Level-Cell NAND Flash Memory

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Cited by 37 publications
(29 citation statements)
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“…, s dv−1 ) ∈ S dv−1 is a realization of S, dim(s) = d v − 1 is the dimension of s, and x ∈ X is a realization of X. Given P L,S|X , the design of Q v is equivalent to the design of Q * in (1) by setting Y = L × S dv−1 and Z = R. We can solve this design problem by using the DP method proposed in [20], after listing (l, s) in descending order based on P L,S|X (l, s|0)/P L,S|X (l, s|1) (see (2)). After designing Q v , a LUT is typically used for storing Q v , and the output message R is passed to the VN's neighbour CNs, with P R|X given by…”
Section: B Mim-lut Decoder Design For Regular Ldpc Codesmentioning
confidence: 99%
See 2 more Smart Citations
“…, s dv−1 ) ∈ S dv−1 is a realization of S, dim(s) = d v − 1 is the dimension of s, and x ∈ X is a realization of X. Given P L,S|X , the design of Q v is equivalent to the design of Q * in (1) by setting Y = L × S dv−1 and Z = R. We can solve this design problem by using the DP method proposed in [20], after listing (l, s) in descending order based on P L,S|X (l, s|0)/P L,S|X (l, s|1) (see (2)). After designing Q v , a LUT is typically used for storing Q v , and the output message R is passed to the VN's neighbour CNs, with P R|X given by…”
Section: B Mim-lut Decoder Design For Regular Ldpc Codesmentioning
confidence: 99%
“…Low-density parity-check (LDPC) codes [1] have been widely applied to communication and data storage systems due to their capacity approaching performance. Many of these systems, such as the NAND flash memory, have strict requirements on the memory consumption and implementation complexity of LDPC decoding [2]- [4]. For the sake of simple hardware implementation, many efforts have been devoted to efficiently represent messages for LDPC decoding [4]- [18].…”
Section: Introductionmentioning
confidence: 99%
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“…Notably, the proposed communication system approaches the outage-limit performance over block-fading channels by taking the fading-block length into the design of the modulation strategy and incorporating the unequal error protection feature into the bit-to-symbol mapping scheme. Furthermore, for the sake of review's completeness, it should be mentioned that protograph LDPC codes are also attractive in the field of data storage (see [28] and references therein) and the joint design of source and channel coding on a double protograph is an alternative approach to avoid the breakdown of the end-to-end communication link [29].…”
Section: B Related Workmentioning
confidence: 99%
“…On the other hand, rate-compatible(RC) LDPC is possible to extract increasing parity by parity in accordance with code rate changes. Many research works have proposed the RC LDPC encoding technique to improve the real-time error correction of communication channels where noise can change rapidly in real time [36]- [38], as well as memory systems, such as NAND flash memory [26]- [28], [39]- [41]. The RC LDPC basically extends the matrix depending on the base PCHK.…”
Section: Ldpcs For Flash Memorymentioning
confidence: 99%