2008 IEEE Hot Chips 20 Symposium (HCS) 2008
DOI: 10.1109/hotchips.2008.7476547
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Ready, fire, aim - 20 years of hits and misses at Hot Chips

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Cited by 2 publications
(5 citation statements)
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“…While TSV needs an additional costly process and new wafer logistics to form through electrodes, HDSV requires only implantation and an annealing process in the same fab, which leads to cost reduction. [23][24][25] Whereas the 3D integration with TSV costs 23% of its wafer cost, 26) the 3D integration with the N-HDSV requires 7% since it needs only one additional mask, where 5% comes from the additional wafer cost with the longer annealing time taken into account and 2% 27) is for the 3D integration similar to the TSV's case. Though the resistance of HDSV is higher than that of TSV, it is still low enough as will be discussed in Sects.…”
Section: Highly Doped Silicon Viamentioning
confidence: 99%
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“…While TSV needs an additional costly process and new wafer logistics to form through electrodes, HDSV requires only implantation and an annealing process in the same fab, which leads to cost reduction. [23][24][25] Whereas the 3D integration with TSV costs 23% of its wafer cost, 26) the 3D integration with the N-HDSV requires 7% since it needs only one additional mask, where 5% comes from the additional wafer cost with the longer annealing time taken into account and 2% 27) is for the 3D integration similar to the TSV's case. Though the resistance of HDSV is higher than that of TSV, it is still low enough as will be discussed in Sects.…”
Section: Highly Doped Silicon Viamentioning
confidence: 99%
“…Highly doped silicon via (HDSV), a new way for power delivery with a deeper than normal and more highly doped well, can replace TSV. [23][24][25] HDSV requires lower additional cost than TSV does because the creation of HDSV is achieved in the frontend-of-line (FEOL) process unlike TSV requiring complicated additional mechanical steps. However, as the resistivity of HDSV is higher than that of TSV, it is required to clarify that the resistivity is low enough for power delivery.…”
Section: Introductionmentioning
confidence: 99%
“…Wireless 3D integration using Inductively-coupled Links (ILs) has recently gained popularity as a low-cost method of realising stacked 3D-ICs [1]. When using ILs, data is encoded as a series of current pulses which are fed through planar inductors fabricated in each die, forming a magnetic field within the die-stack.…”
Section: Introductionmentioning
confidence: 99%
“…This field can be sensed by neighbouring stacked dies, allowing the data to be decoded, and hence communicated wirelessly. In contrast with conventional 3D-IC/3D-SiP solutions, such as flip-chip bonding, wire-bonding or using Through Silicon Vias (TSVs), ILs require no additional postfabrication processing as dies can be simply picked and stacked using adhesive, significantly reducing the assembly cost [1][2][3][4].…”
Section: Introductionmentioning
confidence: 99%
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