Real-time image processing on a local plane SIMD array

Gentile, Antonio; Cruz-Rivera, J.L.; Wills, D.S.; Bustelo, Leugim; Figueroa, Javier; Fonseca-Camacho, Javier E.; Lugo-Beauchamp, Wilfredo E.; Olivieri, R. A.; Quiñones-Cerpa, Marlyn; Rivera-Ríos, Alexis H.; Vargas-Gonzáles, Iomar; Viera-Vera, Michelle

doi:10.1007/bfb0097923

Cited by 15 publications

(8 citation statements)

References 8 publications

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“…The transistor circuitry is scaled to feature sizes ranging from 250 nm to 100 nm. Area projections for memory and digital circuitry are based upon the SIMPil16 focal plane architecture [55] that maps 16 pixels to each processing element. SIMPil16 is a 16-bit implementation fabricated on MOSIS HP 0.8 µm (1.0 µm drawn) CMOS technology.…”

Section: Component Area Modelsmentioning

confidence: 99%

Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture

Robinson

Wills

2005

J VLSI Sign Process Syst Sign Image Video Technol

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Abstract. Monolithic integration of photodetectors, analog-to-digital converters, data storage, and digital processing can improve both the performance and the efficiency of future portable image products. However, digitizing and processing a pixel at the detection site presents the design challenge to deliver a system with the required performance at the lowest cost, not just a system with the highest performance. This paper analyzes the area-time efficiency, the area efficiency, and the energy efficiency of a mixed-signal, SIMD focal plane processing architecture that executes front-end image applications with neighborhood processing. Implementations of the focal plane architecture achieve up to 81x higher area efficiency and up to 11x higher energy efficiency when compared to traditional TI DSP chips. Higher efficiency ratings are required to maintain portability while addressing technology limitations such as interconnect wiring density, heat extraction, and battery life. Systems can be implemented with a less expensive fabrication technology by increasing the number of pixels per processing element (PPE).

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Section: Component Area Modelsmentioning

confidence: 99%

Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture

Robinson

Wills

2005

J VLSI Sign Process Syst Sign Image Video Technol

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“…In order to achieve real-time performance many custom designed SIMD systems, which tend to be costly, have been used in previous research [2].…”

Section: Introductionmentioning

confidence: 99%

Real-Time Image Processing Using Graphics Hardware: A Performance Study

Gong

Langille

Gong

2005

Lecture Notes in Computer Science

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Abstract. Programmable graphics hardware have proven to be a powerful resource for general computing. Previous research has shown that using a GPU for local image processing operations can be much faster than using a CPU. The actual speedup obtained is influenced by many factors. In this paper, we quantify the performance gain that can be achieved by using the GPU for different image processing operations under different conditions. We also compare the strengths and weaknesses of two of the current leaders in mainstream GPUs -ATI's Radeon and nVidia's GeForce FX. Many interesting observations are obtained through the evaluation.

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“…The focal plane scheme allows stream-oriented mapping of image data directly with SIMPil PEs. Image processing applications and algorithms map well to the SIMPil architecture and its SIMD execution model [8]. With only 4096 PEs, SIMPil delivers competitive performance (0.5 to 1.5 Tops/s).…”

Section: Performance Resultsmentioning

confidence: 99%

“…Standard building blocks for image processing algorithms, such as spatial filtering, DFT, morphological filtering, image rotation and labeling, have been implemented [8]. More complex ATR algorithms are being pursued by integrating various components such as region autofocus with textural correlation.…”

Section: Performance Resultsmentioning

confidence: 99%

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Hyper-spectral image processing applications on the SIMD Pixel Processor for the digital battlefield

Chai

Gentile

Lugo-Beauchamp

et al.

Proceedings IEEE Workshop on Computer Vision Beyond the Visible Spectrum: Methods and Applications (CVBVS'99)

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Future military scenarios will rely on advanced imaging sensor technology beyond the visible spectrum to gain total battlefield awareness. Real-time processing of these data streams requires tremendous computational workloads and I/O throughputs. This paper presents three applications for hyper-spectral data streams, vector quantization, region autofocus, and K-means clustering, on the SIMD Pixel Processor (SIMPil). In SIMPil, an image sensor array (focal plane) is integrated on top of a SIMD computing layer to provide direct coupling between sensors and processors, alleviating I/O bandwidth bottlenecks while maintaining low power consumption and portability. Simulation results with sustained operation throughputs of 500-1500 Gops/sec support real-time performances and promote focal plane processing on SIMPil.

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Real-time image processing on a local plane SIMD array

Cited by 15 publications

References 8 publications

Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture

Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture

Real-Time Image Processing Using Graphics Hardware: A Performance Study

Hyper-spectral image processing applications on the SIMD Pixel Processor for the digital battlefield

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