Real-time implementation of the VSELP on a 16-bit DSP chip

Sunwoo, Myung Hoon; Park, S.

doi:10.1109/30.106939

Cited by 7 publications

(1 citation statement)

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“…Figure 4(c) shows how the tasks are allocated to the various processing and communication elements. The bandwidth requirements of each communication task are also displayed [25]. With this allocation at the maximum speed, the utilization of ARM1 is 68.79%, ARM2 is 49.73% and the GPU is 59.7%.…”

Section: Case Studymentioning

confidence: 99%

Methods for power optimization in distributed embedded systems with real-time requirements

Racu

Hamann

Ernst

et al. 2006

Proceedings of the 2006 International Conference on Compilers, Architecture and Synthesis for Embedded Systems

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Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have studied the application of these techniques in real-time embedded system design through intelligent task and/or voltage scheduling, most of these results are limited to relatively simple real-time application models. In this paper, a comprehensive real-time application model including periodic, sporadic and bursty tasks as well as distributed real-time constraints such as end-to-end delays is considered. Two methods are presented for reducing energy consumption while satisfying complex real-time constraints for this model. Experimental results show that the methods achieve significant energy savings without violating any deadlines.

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Section: Case Studymentioning

confidence: 99%