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SymTA/S is a system-level performance and timing analysis approach based on formal scheduling analysis techniques and symbolic simulation. The tool supports heterogeneous architectures, complex task dependencies and context aware analysis. It determines system-level performance data such as end-to-end latencies, bus and processor utilization, and worst-case scheduling scenarios. SymTA/S furthermore combines optimization algorithms with system sensitivity analysis for rapid design space exploration. This paper gives an overview of the current research interests in the SymTA/S project.

Today, only very few techniques out of the host of work on formal performance and timing analysis have been adopted in MpSoC (multiprocessor system-on-chip) design. One of the key reasons is a mismatch between the scheduling models assumed in most formal approaches and the heterogenous world of MpSoC scheduling techniques and communication patterns. This heterogeneity results from IP reuse and a plug-and-play design style, required to effectively reach the necessary design productivity. A second problem is the model complexity. While complex, specialized models can find their way into industry niches, their broad acceptance is extremely doubtful. In this paper, we review the existing scheduling analysis techniques with respect to these key requirements and derive a good compromise between model simplicity on the one hand, and applicability to MpSoC design on the other hand. The approach represents system-level scheduling analysis as a flow-analysis problem for event streams that can be configured to reuse the existing local scheduling analysis techniques. We define transformations between few key event stream models to meet the interfacing requirements of the compositional design style. An example demonstrates the application of the approach, as well as the worthiness of the results.

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System level performance analysis plays a fundamental role in the design process of real-time embedded systems. Several different approaches have been presented so far to address the problem of accurate performance analysis of distributed embedded systems in early design stages. The existing formal analysis methods are based on essentially different concepts of abstraction. However, the influence of these different models on the accuracy of the system analysis is widely unknown, as a direct comparison of performance analysis methods has not been considered so far. We define a set of benchmarks aimed at the evaluation of performance analysis techniques for distributed systems. We apply different analysis methods to the benchmarks and compare the results obtained in terms of accuracy and analysis times, highlighting the specific effects of the various abstractions. We also point out several pitfalls for the analysis accuracy of single approaches and investigate the reasons for pessimistic performance predictions.