Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748)
DOI: 10.1109/real.2003.1253270
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Scheduling analysis integration for heterogeneous multiprocessor SoC

Abstract: Today, only very few techniques out of the host of work on formal performance and timing analysis have been adopted in MpSoC (multiprocessor system-on-chip) design. One of the key reasons is a mismatch between the scheduling models assumed in most formal approaches and the heterogenous world of MpSoC scheduling techniques and communication patterns. This heterogeneity results from IP reuse and a plug-and-play design style, required to effectively reach the necessary design productivity. A second problem is the… Show more

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Cited by 39 publications
(48 citation statements)
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“…5. The upper arrival curve can be expressed as follows [Richter et al, 2003b], Although the periodic burst arrival curve cannot be approximated as the minimum of a set of staircase functions, it can be equivalent to a special logic composition of staircase functions. As shown in Fig.…”
Section: Periodic Burst Eventsmentioning
confidence: 99%
“…5. The upper arrival curve can be expressed as follows [Richter et al, 2003b], Although the periodic burst arrival curve cannot be approximated as the minimum of a set of staircase functions, it can be equivalent to a special logic composition of staircase functions. As shown in Fig.…”
Section: Periodic Burst Eventsmentioning
confidence: 99%
“…Other approaches [1], [11] are based on the propagation of sequences of events [12] and analyze the system through the real-time calculus [13]. To best of our knowledge, however, the correlation between activation of consecutive activation of the same pipeline is lost introducing some pessimism in the analysis.…”
Section: Related Workmentioning
confidence: 99%
“…As the application is distributed over several processing elements, components are of distributed nature as well. For example, this is the typical scenario in the automotive context [1], [2].…”
Section: Introductionmentioning
confidence: 99%
“…Our work builds upon the system-level timing analysis methods for event streams studied in [3,4,31,32]. Although, these papers also deal with end-to-end delays experienced by event streams and the computation of maximum buffer fill levels, their focus is on multiprocessor architectures and the modeling of resource sharing.…”
Section: Previous Work On Timing Analysis Of Event Streamsmentioning
confidence: 99%