2022
DOI: 10.3390/mi13060883
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Recent Progress in Physics-Based Modeling of Electromigration in Integrated Circuit Interconnects

Abstract: The advance of semiconductor technology not only enables integrated circuits with higher density and better performance but also increases their vulnerability to various aging mechanisms which occur from front-end to back-end. Analysis on the impact of aging mechanisms on circuits’ reliability is crucial for the design of reliable and sustainable electronic systems at advanced technology nodes. As one of the most crucial back-end aging mechanisms, electromigration deserves research efforts. This paper introduc… Show more

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Cited by 11 publications
(7 citation statements)
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“…An overview of physics-based modelling approaches for electro migration and their applications for integrated circuit interconnects has been published by Wen-Sheng Zhao et al 5 The impact of electromigration on power grids and signal interconnects is examined in this research. The conventional method and physics-based modeling for electromigration are described.…”
Section: Electro Migration In Integrated Circuit Interconnectsmentioning
confidence: 99%
“…An overview of physics-based modelling approaches for electro migration and their applications for integrated circuit interconnects has been published by Wen-Sheng Zhao et al 5 The impact of electromigration on power grids and signal interconnects is examined in this research. The conventional method and physics-based modeling for electromigration are described.…”
Section: Electro Migration In Integrated Circuit Interconnectsmentioning
confidence: 99%
“…In a Cu damascene structure, the TaN/Ta barrier and the DB act as a boundary for the Cu, and this is where the depletion of metal atoms begins. As a result, Cu EM shifts into the voids through the nucleation, incubation, and growth phases [96]. The dimensions of the vias and metal determine the likelihood that the voids produced in this manner will affect the resistance.…”
Section: Electromigrationmentioning
confidence: 99%
“…For on-chip interconnects, the scale-down of the chip process leads to a decrease in the cross section of interconnects, which means a higher current density, resulting in a higher wind force and more serious EM. Although some techniques, like the Cu alloy seed layer, are applied to suppress EM, the lifetime of the interconnect is still predicted to be seriously decreased …”
Section: Introductionmentioning
confidence: 99%