Reconfigurable Class S power amplifiers at RF and microwave frequencies

25th IET Irish Signals &Amp; Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communi

Farrell

2014

Self Cite

Abstract-This paper demonstrates the ability of current commercially available FPGA hardware to generate radio frequency pulsed modulated signals. This work is carried out to determine the suitability of integrated SerDes devices for use in frequency flexible transmitters capable of modulating switch mode power amplifiers (SMPA's). The paper shows that it is possible to meet spectral mask requirements of -50dBc for WCDMA signals at carrier frequencies in digital dividend from 750MHz to 1GHz.

Section: Figure 2 Sigma Delta Modulatormentioning

confidence: 99%

FPGA SerDes Capability as Switch mode PA Modulator

Finnerty

25th IET Irish Signals &Amp; Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communi

Farrell

2014

Self Cite

“…This requires a high frequency circuit to pre-process the signal and split it into two separate paths. The class S PA is similar as it requires pre-processing of the signal using pulse-density modulation [10]. Shown in this publication, the signal into the class S PA is a high resolution digital signal at a fraction of the carrier frequency.…”

Section: Class-s Pa Demonstrator Designmentioning

confidence: 99%

Reconfigurable high frequency class S power amplifier demonstrator

2011 Workshop on Integrated Nonlinear Microwave and Millimetre-Wave Circuits

Corley

Podsiadlik

et al. 2011

-This paper presents an end-to-end high frequency class S power amplifier. A description of the full testbench and some important points on generation of RF outputs from FPGA devices and current mode class D design are given. Experimental measurements are provided for the prototype PA consisting of a signal generator, analog to digital converter, driver circuit, current mode class D switching stage and bandpass filter. Theory and experimentally measured results for this prototype are presented for a multi tone signal centred at 930 MHz and with a total output power of 24.7dBm.

“…Digital multiplication of the delta-sigma modulator with a binary signal at twice the desired carrier frequency is an interesting case of the previous technique [7]. Binary multiplication is a single bit operation and easy to implement.…”

Section: Existing Modulator Architecturesmentioning

confidence: 99%

Pulse width modulation of multilevel delta-sigma output for class S power amplifier

Podsiadlik

2009 European Conference on Circuit Theory and Design

Canniff

et al. 2009

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In this paper a platform that implements the digital processing and RF carrier generation for class S PA operation is presented. This implementation consists of a bandpass delta sigma modulator (DSM) with a multi-level quantizer followed by a pulse width modulator and frequency upconversion stage. The principle of operation is described and validation is provided through simulation and experimental measurements on a prototype of the modulator. It is shown that the output from the new modulator can achieve significant improvements in SNR performance compared to a two level DSM with little added computational overhead.