Abstract-When a delta-sigma modulator (DSM) is placed before a class D switching stage the combination can be used to amplify time varying envelope signals. However a bandpass DSM is commonly employed and is required to have a sampling frequency approximately four times the carrier frequency. At RF or microwave frequencies proprietary hardware was previously needed to implement the DSM. However, it is shown here in simulation and from experimental measurement that a suitable DSM for class S power amplifiers can be implemented at RF and microwave frequencies using mid-range FPGA technology.

In

In this paper a platform that implements the digital processing and RF carrier generation for class S PA operation is presented. This implementation consists of a bandpass delta sigma modulator (DSM) with a multi-level quantizer followed by a pulse width modulator and frequency upconversion stage. The principle of operation is described and validation is provided through simulation and experimental measurements on a prototype of the modulator. It is shown that the output from the new modulator can achieve significant improvements in SNR performance compared to a two level DSM with little added computational overhead.