Reconfigurable hardware SAT solvers: a survey of systems

Skliarova, Iouliia; Ferrari, António B.

doi:10.1109/tc.2004.102

Cited by 70 publications

(21 citation statements)

References 30 publications

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“…It is known that the SAT problem can be formulated over different models [3] and we will consider for such purposes ternary matrices [4,5]. They have been chosen because of the reasons reported in [4,5].…”

Section: Matrix Compression/decompression Techniquesmentioning

confidence: 99%

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

Sklyarov

Skliarova

Pimentel

et al. 2004

Field Programmable Logic and Application

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Abstract. The paper describes two methods for the design of matrix-oriented SAT solvers based on data compression. The first one provides matrix compression in a host computer and decompression in an FPGA. It is shown that although some improvements have been achieved in this case, there exists a better solution. The second method makes possible to execute operations required for solving the SAT problem over compressed matrices.

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Section: Matrix Compression/decompression Techniquesmentioning

confidence: 99%

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

Sklyarov

Skliarova

Pimentel

et al. 2004

Field Programmable Logic and Application

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“…SAT solving algorithms involve compute-intensive, logic bit-level, highly parallelizable operations, which makes reconfigurable computing appealing [1]. Various approaches have been proposed to accelerate SAT solving using reconfigurable computing by either migrating the whole problem to hardware or partitioning the problem into hardware and software parts [2].…”

Section: Introductionmentioning

confidence: 99%

A Shift Register based Clause Evaluator for Reconfigurable SAT Solver

Safar

Shalan

El-Kharashi

et al. 2007

2007 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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“…[3]. Note that many combinatorial algorithms are dealing with a huge amount of data, which have to be transferred between a host computer and an FPGA-based accelerator [9]. In many circumstances, due to the complexity, the problem cannot be completely solved just in an FPGA, and combined hardware/software solutions are employed.…”

mentioning

confidence: 99%

FPGA-based implementation of recursive algorithms

Sklyarov

2004

Microprocessors and Microsystems

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The paper suggests a novel method for implementing recursive algorithms in hardware. The required support for recursion has been provided through a modular and a hierarchical specification of a control unit that can be translated to an implementation of the respective hardware circuit on the basis of a recursive hierarchical finite state machine and through a mechanism that permits the contents of an execution unit to be stored/restored between hierarchical calls/returns. The paper describes all the details that are required to implement recursive algorithms in hardware. It begins with software (Cþþ) models and finishes with synthesizable VHDL codes. Two practical applications of recursive algorithms in the data sorting and compression area have been studied in detail. q 2004 Published by Elsevier B.V.

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Reconfigurable hardware SAT solvers: a survey of systems

Cited by 70 publications

References 30 publications

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

A Shift Register based Clause Evaluator for Reconfigurable SAT Solver

FPGA-based implementation of recursive algorithms

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