Reconfigurable interconnect for next generation systems

Verbauwhede, Ingrid; Chang, M.-C. Frank

doi:10.1145/505362.505363

Cited by 7 publications

(8 citation statements)

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“…27: it shows a multimedia mobile phone system on a RINGS platform [24]. Typical for a RINGS architecture is the co-existence of very different optimized modules, connected together by a re-configurable interconnect.…”

Section: Rings For Soc and Sopmentioning

confidence: 99%

Advanced RF/Baseband Interconnect Schemes for Inter- and Intra-ULSI Communications

Chang

Verbauwhede

Chien

et al. 2005

IEEE Trans. Electron Devices

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Abstract-Future inter-and intra-ULSI interconnect systems demand extremely high data rates (up to 100 Gbps/pin or 20-Tbps aggregate) as well as bidirectional multiI/O concurrent service, re-configurable computing/processing architecture, and total compatibility with mainstream silicon system-on-chip and system-in-package technologies. In this paper, we review recent advances in interconnect schemes that promise to meet all of the above system requirements. Unlike traditional wired interconnects based solely on time-division multiple access for data transmission, these new interconnect schemes facilitate the use of additional multiple access techniques including code-division multiple access and frequency-division multiple access to greatly increase bandwidth and channel concurrency as well as to reduce channel latency. The physical transmission line is no longer limited to a direct-coupled metal wire. Rather, it can be accomplished via either wired or wireless mediums through capacitor couplers that reduce the baseband noise and dc power consumption while simplifying the fabrication process by eliminating vertical metal studs needed in three-dimensional ICs. These new advances in interconnect schemes would fundamentally alter the paradigm of ULSI data communications and enable the design of next-generation computing/processing systems.

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Section: Rings For Soc and Sopmentioning

confidence: 99%

Advanced RF/Baseband Interconnect Schemes for Inter- and Intra-ULSI Communications

Chang

Verbauwhede

Chien

et al. 2005

IEEE Trans. Electron Devices

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“…New interconnect schemes are proposed that introduce frequency and code division or a combination of all above [19].…”

Section: Physical Layer Reconfigurable Interconnectmentioning

confidence: 99%

The happy marriage of architecture and application in next-generation reconfigurable systems

Verbauwhede

Schaumont

2004

Proceedings of the 1st Conference on Computing Frontiers

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New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an architecture. Embedding such applications in a portable, low-energy context is the art of molding it onto an energyefficient target architecture combined with an energy efficient execution. With a reconfigurable architecture, this task becomes a two-way process where the architecture adapts to the application and vice-versa. This leads to the idea of a marriage between architecture and application.These next generation reconfigurable systems consist of a heterogeneous collection of domain-specific processing units. Communication between processors occurs over a reconfigurable interconnect scheme. Global control is provided by one or more embedded micro-controllers, which operate at a low frequency since they don't run compute intensive functions. Because of the domain specific features, this architecture is low power, yet at the same time reconfigurable.In this paper, we will describe the RINGS (Reconfigurable interconnect for next generation systems) architecture and the associated design environment, GEZEL. We will describe how applications are mapped onto RINGS architectures and how they can be modeled and simulated in the GEZEL environment.

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“…It shows how an embedded SoC can contain multiple application domains, in this case, a signal processing domain, a communications domain to provide a wireless connection and a cryptographic domain. The systems is connected together by means of a reconfigurable interconnect [Ver02]. One main advantage of this partitioning in physically separate processor units is that it improves security.…”

Section: Architecture Levelmentioning

confidence: 99%