Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm

Abstract

A method for the ecient computation of accurate reduced-order models of large linear circuits is described. The method, called MPVL, employs a novel block Lanczos algorithm to compute matrix Pad e approximations of matrix-valued network transfer functions. The reduced-order models, computed to the required level of accuracy, are used t o s p e e d up the analysis of circuits containing large linear blocks. The linear blocks are r eplaced by their reduced-order models, and the resulting smaller circuit can be analyzed with general-purpose simulators, with signicant savings in simulation time and, practically, no loss of accuracy.32nd ACM/IEEE Design Automation Conference ®

Structure-Preserving Model Order Reduction of RCL Circuit Equations

“…For the special cases of RC, RL, and LC circuits, there are variants of the general MPVL (Matrix-Padeé Via Lanczos) method [11] that do preserve the RC, RL, and LC structures, respectively. In particular, the SyPVL and SyMPVL algorithms are procedures for for generating reduced-order models that can be synthesized as RC, RL, and LC circuits, respectively; see [22,23,24].…”

“…Consider equations (11) and their equivalent statement (16) as a system of integro-DAEs. It turns out that (11) (and thus (16)) can be rewritten as a first-order time-invariant linear dynamical system of the form…”

“…PVL [9,10] and its multi-port version MPVL [11] use variants of the Lanczos process [26] to stably compute reduced-order models that represent Padé or matrix-Padé approximations [5] of the circuit transfer function. SyPVL [21] and its multi-port version SyMPVL [12,23,24] are versions of PVL and MPVL, respectively, that are tailored to RCL circuits.…”

Automatic generation of geometrically parameterized reduced order models for integrated spiral RF-inductors

“…One recently developed technique for generating geometrically parameterized models of physical systems assumed a linear dependence on the parameter, and was applied to reducing a discretized linear partial differential equation using a projection approach [4]. Resistor-capacitor (RC) models of interconnect are linearly dependent on width and spacing parameters, at least for simplified models, and are typically reduced with respect to the Laplace transform parameter using projection approaches [5,6,7,8,9,10,11,12,13]. This fortuitous combination of attributes made generating geometrically-parameterized reduced-order models of RC interconnect a natural candidate to drive the development of projection-based multiparameter model reduction techniques [14,15].…”

Passive reduced-order models for interconnect simulation and their computation via Krylov-subspace algorithms

“…PVL [7] and its multi-port version MPVL [8] use variants of the Lanczos process [15] to stably compute reduced-order models that represent Padé or matrix-Padé approximations [5] of the circuit transfer function. SyPVL [12] and its multi-port version SyMPVL [9,13,14] are versions of PVL and MPVL, respectively, that are tailored to RLC circuits.…”