Reducing Exit Stub Memory Consumption in Code Caches

Guha, Anirban; Hazelwood, Kim; Soffa, Mary Lou

doi:10.1007/978-3-540-69338-3_7

Cited by 17 publications

(21 citation statements)

References 14 publications

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“…Reducing the size of DBT's "control code" has been studied by Guha et al, who focus only on trampolines [6]. In their setup, fragments and trampolines are inserted from opposite ends of the code cache.…”

Section: Related Workmentioning

confidence: 99%

“…While these approaches are important, they primarily address what code to keep and when to discard it. They do not tackle the footprint of the translated code, although some work considers it in a limited way [2,7,6]. We show in this paper, the code inserted by the DBT for its own purposes can easily account for 70% of the code in the code cache!…”

Section: Introductionmentioning

confidence: 99%

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Reducing pressure in bounded DBT code caches

Baiocchi

Childers

Davidson

et al. 2008

Proceedings of the 2008 International Conference on Compilers, Architectures and Synthesis for Embedded Systems

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Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight constraints on memory and performance. A DBT uses a software-managed code cache to hold blocks of translated code. To minimize overhead, the code cache is usually large so blocks are translated once and never discarded. However, an embedded system may lack the resources for a large code cache. This constraint leads to significant slowdowns due to the retranslation of blocks prematurely discarded from a small code cache. This paper addresses the problem and shows how to impose a tight size bound on the code cache without performance loss. We show that about 70% of the code cache is consumed by instructions that the DBT introduces for its own purposes. Based on this observation, we propose novel techniques that reduce the amount of space required by DBT-injected code, leaving more room for actual application code and improving the miss ratio. We experimentally demonstrate that a bounded code cache can have performance on-par with an unbounded one.

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Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Reducing pressure in bounded DBT code caches

Baiocchi

Childers

Davidson

et al. 2008

Proceedings of the 2008 International Conference on Compilers, Architectures and Synthesis for Embedded Systems

View full text Add to dashboard Cite

show abstract

“…For this reason, DBT has attracted attention for embedded systems [2,3,5,6,9,17,22]. Several compelling uses of DBT in embedded systems have been explored.…”

Section: Related Workmentioning

confidence: 99%

“…Guha et al [6] developed techniques to reduce the size of trampolines in the translated code. Baiocchi et al [2] examined the sources of code expansion in a dynamic translator for embedded systems with scratchpad memory and describe approaches to minimize the expansion.…”

Section: Related Workmentioning

confidence: 99%

Addressing the challenges of DBT for the ARM architecture

et al. 2009

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Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its run-time performance overhead can be relatively high. The run-time overhead is important in embedded systems due to their slow processor clock speeds, simple microarchitectures, and small caches. This paper addresses how to implement efficient DBT for ARM-based embedded systems, taking into account instruction set and cache/TLB nuances. We develop several techniques that reduce DBT overhead for the ARM. Our techniques focus on cache and TLB behavior. We tested the techniques on an ARM-based embedded device and found that DBT overhead was reduced by 54% in comparison to a general-purpose DBT configuration that is known to perform well, thus further enabling DBT for a wide range of purposes.

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“…Instead, our approach makes all decisions online. Guha, Hazelwood and Soffa suggested a technique to reduce code footprint due to exit stubs in a program instrumenter [9]. Other related work comes from Shogan and Childers [23].…”

Section: Related Workmentioning

confidence: 99%

Fragment cache management for dynamic binary translators in embedded systems with scratchpad

Baiocchi

Childers

Davidson

et al. 2007

Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

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Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for embedded systems. However, a challenge to DBT in this domain is stringent constraints on memory and performance. The translated code buffer used by DBT may occupy too much memory space. This paper proposes novel schemes to manage this buffer with scratchpad memory. We use footprint reduction to minimize the space needed by the translated code, victim compression to reduce the cost of retranslating previously seen code, and fragment pinning to avoid evicting needed code. We comprehensively evaluate our techniques to demonstrate their effectiveness.

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Reducing Exit Stub Memory Consumption in Code Caches

Cited by 17 publications

References 14 publications

Reducing pressure in bounded DBT code caches

Reducing pressure in bounded DBT code caches

Addressing the challenges of DBT for the ARM architecture

Fragment cache management for dynamic binary translators in embedded systems with scratchpad

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