Reducing the Branch Power Cost in Embedded Processors Through Static Scheduling, Profiling and SuperBlock Formation

Hicks, Michael A.; Egan, Colin; Christianson, Bruce; Quick, Patrick

doi:10.1007/11859802_31

Cited by 3 publications

(2 citation statements)

References 7 publications

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“…Previous approaches have used a fixed bias level [9], or, in effect, no particular bias level at all; a branch is simply marked as "likely to be taken" or "unlikely to be taken". Scant regard is given to how this will reconcile with the behaviour of the dynamic predictor in which it will be executing, and often the dynamic predictor will be more accurate [10]. Consequently, branch removal in this way impacts on performance and increases power consumption.…”

Section: Predicting Biased Branchesmentioning

confidence: 99%

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Towards an energy efficient branch prediction scheme using profiling, adaptive bias measurement and delay region scheduling

Hicks

Egan

Christianson

et al. 2007

2007 International Conference on Design &Amp; Technology of Integrated Systems in Nanoscale Era

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Abstract-Dynamic branch predictors account for between 10% and 40% of a processor's dynamic power consumption. This power cost is proportional to the number of accesses made to that dynamic predictor during a program's execution. In this paper we propose the combined use of local delay region scheduling and profiling with an original adaptive branch bias measurement. The adaptive branch bias measurement takes note of the dynamic predictor's accuracy for a given branch and decides whether or not to assign a static prediction for that branch. The static prediction and local delay region scheduling information is represented as two hint bits in branch instructions. We show that, with the combined use of these two methods, the number of dynamic branch predictor accesses/updates can be reduced by up to 62%. The associated average power saving is very encouraging; for the example high-performance embedded architecture n average global processor power saving of 6.22% is achieved.

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Section: Predicting Biased Branchesmentioning

confidence: 99%

“…When profiling each branch in a program's execution, an ideal profiler records the directional history for each branch, and also the prediction history [10] [5]. From this record or trace, we compute whether a branch's bias is equal to, or greater than its associated prediction accuracy from the dynamic predictor.…”

Section: B Adaptive Bias Measurementmentioning

confidence: 99%

Towards an energy efficient branch prediction scheme using profiling, adaptive bias measurement and delay region scheduling

Hicks

Egan

Christianson

et al. 2007

2007 International Conference on Design &Amp; Technology of Integrated Systems in Nanoscale Era

Self Cite

View full text Add to dashboard Cite

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Dynamic Information Flow Control Architecture for Web Applications

Yoshihama

Yoshizawa

Watanabe

et al. 2007

Computer Security – ESORICS 2007

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Implicit Flows: Can’t Live with ‘Em, Can’t Live without ‘Em

King

Hicks

et al. 2008

Information Systems Security

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Abstract. Verifying that programs trusted to enforce security actually do so is a practical concern for programmers and administrators. However, there is a disconnect between the kinds of tools that have been successfully applied to real software systems (such as taint mode in Perl and Ruby), and information-flow compilers that enforce a variant of the stronger security property of noninterference. Tools that have been successfully used to find security violations have focused on explicit flows of information, where high-security information is directly leaked to output. Analysis tools that enforce noninterference also prevent implicit flows of information, where high-security information can be inferred from a program's flow of control. However, these tools have seen little use in practice, despite the stronger guarantees that they provide.To better understand why, this paper experimentally investigates the explicit and implicit flows identified by the standard algorithm for establishing noninterference. When applied to implementations of authentication and cryptographic functions, the standard algorithm discovers many real implicit flows of information, but also reports an extremely high number of false alarms, most of which are due to conservative handling of unchecked exceptions (e.g., null pointer exceptions). After a careful analysis of all sources of true and false alarms, due to both implicit and explicit flows, the paper concludes with some ideas to improve the false alarm rate, toward making stronger security analysis more practical.

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Reducing the Branch Power Cost in Embedded Processors Through Static Scheduling, Profiling and SuperBlock Formation

Cited by 3 publications

References 7 publications

Towards an energy efficient branch prediction scheme using profiling, adaptive bias measurement and delay region scheduling

Towards an energy efficient branch prediction scheme using profiling, adaptive bias measurement and delay region scheduling

Dynamic Information Flow Control Architecture for Web Applications

Implicit Flows: Can’t Live with ‘Em, Can’t Live without ‘Em

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