2021
DOI: 10.1016/j.apsusc.2021.151029
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Reduction of leakage current in amorphous Oxide-Semiconductor Top-gated thin film transistors by interface engineering with dipolar Self-Assembled monolayers

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Cited by 9 publications
(3 citation statements)
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“…The substrates were then cleaned ultrasonically with different solvents, in the sequence of deionized (DI) water, acetone, and IPA, and subsequently blown dry with nitrogen and treated with UV/ozone. Afterward, the SAM solutions were spin-coated onto substrates, 53 followed by rinsing with IPA and drying with N 2 gas. Finally, the SAM-modified substrates were annealed at 80 1C for 1 min.…”
Section: Sam Modification Of the Ito Electrodesmentioning
confidence: 99%
“…The substrates were then cleaned ultrasonically with different solvents, in the sequence of deionized (DI) water, acetone, and IPA, and subsequently blown dry with nitrogen and treated with UV/ozone. Afterward, the SAM solutions were spin-coated onto substrates, 53 followed by rinsing with IPA and drying with N 2 gas. Finally, the SAM-modified substrates were annealed at 80 1C for 1 min.…”
Section: Sam Modification Of the Ito Electrodesmentioning
confidence: 99%
“…Polymer-based printed stretchable transistors have attracted attention due to their intrinsic flexibility. 210 Wang et al demonstrated a printed stretchable polymer transistor array (Fig. 10c).…”
Section: Applicationsmentioning
confidence: 99%
“…The leakage current comes from the excess carriers in the as-deposited IGZO layer, [66] and the inferior quality of the interface of channel/dielectric layer or the bulk of the dielectric layer. [67] Threshold voltage: Vth is the voltage at which most carriers accumulate at the interface of the dielectric layer and the channel layer. It is highly correlated with the carrier concentration and carrier transport in the channel layer.…”
Section: Figure Of Merits Of Igzo Tftmentioning
confidence: 99%