2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014
DOI: 10.1109/aspdac.2014.6742927
|View full text |Cite
|
Sign up to set email alerts
|

Redundant-via-aware ECO routing

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2015
2015
2020
2020

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 5 publications
(1 citation statement)
references
References 11 publications
0
1
0
Order By: Relevance
“…Double via insertion during post-routing layout optimization or identifying a viafailure aware routing [7] as depicted in Fig. 1 or even redundant via aware ECO routing during mask optimization [8] for increased reliability and yield of the fabricated design are some of the known approaches to minimize these failures. Moreover, vias consume substantial routing area and pose as additional routing blockages in the routing regions impacting routability of the design.…”
Section: Introductionmentioning
confidence: 99%
“…Double via insertion during post-routing layout optimization or identifying a viafailure aware routing [7] as depicted in Fig. 1 or even redundant via aware ECO routing during mask optimization [8] for increased reliability and yield of the fabricated design are some of the known approaches to minimize these failures. Moreover, vias consume substantial routing area and pose as additional routing blockages in the routing regions impacting routability of the design.…”
Section: Introductionmentioning
confidence: 99%