Reliability-aware Co-synthesis for Embedded Systems

Abstract

As technology scales, transient faults have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates reliability into hardware-software co-design paradigm for embedded systems. We introduce an allocation and scheduling algorithm that efficiently handles conditional execution in multi-rate embedded systems, and selectively duplicates critical tasks to detect or correct transient errors, such that the reliability of the system is improved. Two methods are proposed to insert duplicated tasks into the schedule. The improved reliability is achieved by utilizing the otherwise idle computation resources and taking advantage of the overlapping schedule for mutually exclusive tasks in the conditional task graph, such that it incurs no resource or performance penalty.

An Efficient Approach towards Mitigating Soft Errors Risks

“…Software based approaches to tolerate soft errors include redundant programs to detect and/or recover from the problem, duplicating instructions [13], [14], task duplication [15], dual use of super scalar data paths, and Error detection and Correction Codes (ECC) [16]. Chip level Redundant Threading (CRT) [12] used a load value queue such that redundant executions can always see an identical view of memory.…”

“…Hardware and software combined approaches [24], [25], [29], [26], [30], [27] use the parallel processing capacity of chip multiprocessors (CMPs) and redundant multi threading to detect and recover the problem. Mohamed et al [62] shows Chip Level Redundantly Threaded Multiprocessor with Recovery (CRTR), where the basic idea is to run each program twice, as two identical threads, on a simultaneous multithreaded processor.…”

“…In Simultaneously and Redundantly Threaded processors with Recovery (SRTR) scheme [65], there is a probability of fault corrupting both threads since the leading thread and trailing thread execute on the same processor. Others [61], [66], [63], [64] have followed similar approaches. However, in all cases the system is vulnerable to soft error problems in key areas.…”

Design space exploration of reliable networked embedded systems

“…Another approach [10,11] tries to maximize reliability by selectively introducing redundancy for detecting soft errors. This approach is able to consider resources with the same functionality but different area, delay or reliability values.…”

Synthesis of Fault-Tolerant Embedded Systems

“…In order to reduce cost, other techniques are required such as software replication [3,28], recovery with checkpointing [18,27,29], and re-execution [19]. However, if applied in a straightforward manner to an existing design, these techniques introduce significant time overheads, which can lead to unschedulable solutions.…”