Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch

Abstract

Abstract-This study presents a technique to improve the reliability and the Mean Time to Failure (MTTF) of hardware task graphs running on reconfigurable computers. This technique, which has been named Task Early-fetch, can be applied to a sequence of one or several applications, represented as task graphs. It consists in carrying out the reconfiguration of some tasks within the execution of the previous task graph, plus increasing the redundancy level of the early-fetched tasks. Experimental results on actual task graphs show the positive impacts of the proposed technique. Thus, without deteriorating the execution time (makespan), on average, a 114% MTTF improvement is achieved for no-fault-tolerant task graphs, and the improvement is more significant when applying to faulttolerant task graphs. Finally, this paper presents a hardware implementation of a manager that applies these techniques at run-time and steers the execution of the running task graphs. It demonstrates that, with 0.03% consumption of FFs and LUTs and also 1.22% occupancy of BRAMs available on a Xilinx Virtex UltraScale XCVU095-2FFVA2104E FPGA, the required run-time computations can be carried out in negligible delays.

Analytical reliability estimation of SRAM-based FPGA designs against single-bit and multiple-cell upsets

“…The reliability of a hardware task depends on its error rate. By assuming that 𝜌 is the error rate, the reliability of a hardware task at time 𝑡 is obtained as: 𝑅(𝑡) = 𝑒 −𝜌𝑡 [26]. In this paper, this classical formulation has been extended to include soft error rates induced by events of diverse multiplicity by taking into account the task's size, computation time, and critical bits.…”

Chaotic neural network model for SMISs reliability prediction based on interdependent network SMISs reliability prediction by chaotic neural network

“…Among them, the typical reliability models include series systems model, 17 parallel systems model, 18 series parallel‐series systems model, 19 cold storage systems model, 20 hot standby systems model, 21 and so on. In hardware reliability model, scholars built mathematical models for hardware reliability mainly through the following indicators: the reliability of products, 22 availability, 23 mean time to failure, 24 mean time to first failure, 25 fault frequency, 26 mean up‐time or mean time between failure, 27 mean time between repair, 28 mean down time, 29,30 and so on. The main research methods include extreme learning machine, 31 dynamic optimization, 32 SVM, 33,34 adaptive neuro‐fuzzy, 35,36 and so on.…”