Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology

Griggio, Flavio; Palmer, J.; Pan, Fengjia; Toledo, Nikholas G.; Schmitz, A.; Tsameret, Ilan; Kasim, R.; Leatherman, G.; Hicks, J.; Madhavan, Advait; Shin, Jinho; Steigerwald, Joseph M.; Yeoh, A.; Auth, C.

doi:10.1109/irps.2018.8353641

Cited by 49 publications

(27 citation statements)

References 6 publications

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“…Moreover, also the electromigration (EM) performance of Cu interconnects below 30-nm linewidth is severely degraded [2]- [4]. Therefore, alternative metals, such as cobalt [5]- [7] and ruthenium [7]- [9], are being investigated as replacements for Cu. The resistivity of Co and Ru versus Cu has already been studied extensively [10], [11], but studies of their EM performance remain limited [7], [12]- [14].…”

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confidence: 99%

“…Nevertheless, it was found that tungsten, which has an even higher melting temperature than Ru and Co, had an EM activation energy of 0.69 eV [16], in spite of long lifetimes being observed. Initial reports of the EM activation energy of Co and Ru showed values ≈2 eV [5], [7]. However, concerns may arise regarding the adequacy of these numbers, as they were obtained under highly accelerated EM test conditions.…”

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confidence: 99%

“…EM experiments on Co and Ru are challenging because they require very high temperature and current density in order to observe failures within a reasonable amount of time [12]. At such elevated stress conditions, the failure mechanisms may be different than under normal operation and might even result in a change in microstructure [5], [13]. To address this problem, we have proposed 1/ f or, more generally, lowfrequency noise (LFN) measurements to characterize EM activation energies [16]- [18].…”

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confidence: 99%

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Electromigration Activation Energies in Alternative Metal Interconnects

Beyne

Pedreira

Oprins

et al. 2019

IEEE Trans. Electron Devices

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The electromigration (EM) activation energy (E A ) of alternative metals, such as Ru and Co, was obtained using low-frequency noise (LFN) measurements. High activation energies were expected, but values of ≈1 eV are found, most likely related to diffusion along with the metaldielectric interface. Wafer-level accelerated EM tests were carried out to compare the LFN E A to the EM E A in the Ru wires. The calculation of the EM E A is found to be strongly dependent on the assumed temperature profile in the wire due to Joule heating (JH). The temperature profile was calculated analytically, assuming the contacts are at ambient temperature. For a void forming in direct proximity of the contact, the EM E A then matches the LFN E A . For a void at average wire temperature (ambient + JH), E A ≈ 2 eV. In addition to demonstrating the application of LFN to study EM in alternative metals, this article also cautions for the impact of JH on the calculation of E A in interconnects.

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confidence: 99%

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confidence: 99%

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confidence: 99%

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Electromigration Activation Energies in Alternative Metal Interconnects

Beyne

Pedreira

Oprins

et al. 2019

IEEE Trans. Electron Devices

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“…Electro chemical deposition (ECD) of Co is deemed the most promising candidate. Intel has shown a new metallization solution to meet the reliability challenges of technology scaling [ 270 ]. For this process, at trench contact, electroplating of Co occurs on a CVD TiN barrier/adhesion and a CVD Co seed layer.…”

Section: Metal Materials Interconnectmentioning

confidence: 99%

State of the Art and Future Perspectives in Advanced CMOS Technology

et al. 2020

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The international technology roadmap of semiconductors (ITRS) is approaching the historical end point and we observe that the semiconductor industry is driving complementary metal oxide semiconductor (CMOS) further towards unknown zones. Today’s transistors with 3D structure and integrated advanced strain engineering differ radically from the original planar 2D ones due to the scaling down of the gate and source/drain regions according to Moore’s law. This article presents a review of new architectures, simulation methods, and process technology for nano-scale transistors on the approach to the end of ITRS technology. The discussions cover innovative methods, challenges and difficulties in device processing, as well as new metrology techniques that may appear in the near future.

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“…In response to the scaling challenges, Intel introduces a new metallization solution to meet the reliability challenges of technology scaling [154]. At trench contact, electroplating of Co occurs on a chemical vapor deposition (CVD) TiN barrier/adhesion and CVD Co seed layer.…”

Section: Beol For Nano-scale Transistorsmentioning

confidence: 99%

Miniaturization of CMOS

Radamson

Zhang

et al. 2019

Micromachines

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When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today’s 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.

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Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology

Cited by 49 publications

References 6 publications

Electromigration Activation Energies in Alternative Metal Interconnects

Electromigration Activation Energies in Alternative Metal Interconnects

State of the Art and Future Perspectives in Advanced CMOS Technology

Miniaturization of CMOS

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