RELY: a reliability simulator for VLSI circuits

Hsu, W.-J.; Shih, Chih-Ching; Sheu, B.J.

doi:10.1109/cicc.1988.20945

Cited by 10 publications

(3 citation statements)

References 4 publications

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“…Therefore, the accurate methods of predicting hot carrier degradation in an actual AC circuit operation are needed so that the hot carrier criteria can be modified without the sacrifice of high transistor performance. For this purpose, reliability simulators based on circuit simulators have been reported, such as RELY [6], HOTRON [7], and BERT [8]. However, these simulators cannot accurately predict hot carrier degradation because they merely use the transistor parameters before and after stress and employ empirical equations relating the substrate current or the gate current to the hot carrier life time.…”

Section: Introductionmentioning

confidence: 99%

Reliability simulation of AC hot carrier degradation for deep sub‐micron MOSFETs

Shimizu

Tanizawa

Kusunoki

et al. 1996

Electron Comm Jpn Pt II

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High performance under low supply voltage is required for ULSIs in combination with the higher packing density that results from scaling down to the deep sub-micron region. For this requirement, the conventional method, using the DC hot carrier lifetime of MOSFETs as measured by DC stress, overestimates the degradation caused by real circuit operation. As a result, the improvement of MOSFET performance is limited by attempting to satisfy the overestimated hot carrier criteria under DC stress. Therefore, it is strongly desired that the reliability simulation estimate accurately hot carrier degradation in real circuit operation. We have found that the degradation rate depends on the stress conditions and can be expressed in terms of the difference between the gate and drain voltages. Hence, in this paper, we propose a new method of modeling and calculation of hot carrier degradation that incorporates this dependence and will demonstrate improved accuracy in predicting degradation and life time for both AC and DC bias conditions. We also propose a new duty ratio extraction method that can be used to predict the lifetime for hot carrier degradation under actual circuit operation.

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Section: Introductionmentioning

confidence: 99%

Reliability simulation of AC hot carrier degradation for deep sub‐micron MOSFETs

Shimizu

Tanizawa

Kusunoki

et al. 1996

Electron Comm Jpn Pt II

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“…Early attempts on the quantitative analysis of circuit reliability have been reported [2], [3], [4], [5]. Aur et al [2] studied the reliability of the precharge circuitry for DRAM chips.…”

Section: Introductionmentioning

confidence: 99%

“…The basic scheme of a flexible reliability simulator was first introduced in [3]. In this paper, description of the hierarchical simulation environment and the incorporation of degradation due to ac electrical stressing is included.…”

Section: Introductionmentioning

confidence: 99%

Integrated-circuit reliability simulation with emphasis on hot-carrier effects

Hsu

Gowda

Sheu

1991

Analog Integr Circ Sig Process

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Reliability assurance and enhancement of analog VLSI circuits are of fundamental importance in the design of high quality signal processing and computing systems. An analog integrated circuit may fail due to degradation of some critical transistors. In this paper, strategies for use in a hierarchical reliability simulation environment covering various levels of VLSI circuit design are presented. Hot-carrier effects are used to demonstrate the prediction of degradation in circuit performance. This degradation information is propagated through the design hierarchy, with the data at each stage conforming with the complexity of representation at that stage. Circuit topology changes may be made at different levels to reduce the intensive electrical stress applied to weak components. At the top level the chip degradation information is essential for the design of reliable VLSI systems. The method used to include the first-order ac degradation effects into the circuit reliability simulator is described. Experimental results on inverters, precharging circuitry for sense amplifiers, and operational amplifiers designed in submicron technologies are presented.

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A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

Quader

et al. 1993

IEEE Trans. Electron Devices

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RELY: a reliability simulator for VLSI circuits

Cited by 10 publications

References 4 publications

Reliability simulation of AC hot carrier degradation for deep sub‐micron MOSFETs

Reliability simulation of AC hot carrier degradation for deep sub‐micron MOSFETs

Integrated-circuit reliability simulation with emphasis on hot-carrier effects

A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

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