Research of Single-Event Burnout in Power Planar VDMOSFETs by Localized Carrier Lifetime Control

Abstract

This paper presents 2-D numerical simulation results of single-event burnout (SEB) in power planar vertical double-diffused MOSFET (VDMOSFET) with localized carrier lifetime control. A low carrier lifetime control region (LCLCR) is introduced to accelerate the recombination rate of the generated holes caused by an ion's impact. The optimal localized range with LCLCR in epitaxial layer has been investigated. The SEB inhibition mechanism with LCLCR is analyzed and discussed. A VDMOSFET with localized LCLCR can operate like a normal VDMOSFET and can have improved SEB performance effectively. In addition, the leakage current density in breakdown characteristics of VDMOSFET is studied based on the variation of carrier lifetime. Index Terms-Low carrier lifetime control region (LCLCR), numerical simulation, power vertical double-diffused MOSFET (VDMOSFET), single-event burnout (SEB). 0018-9383

SEGR- and SEB-hardened structure with DSPSOI in power MOSFETs

“…From Figs. 4-6, we can summarize that the SOA of the conventional structure is V gs = 0 V, V ds = 40 V when a single heavy ion irradiates the device as a constant of 98 MeV•cm 2 /mg, and the SOA of the DSPSOI_MOS is V gs = 0 V, V ds = 60 V. The reason that the SOA is enhanced by up to 50% is the recombination mechanism of interface between oxide and silicon, because there are large numbers of mobile ionic charges, oxide fixed charges, interface trapped charges and oxide trapped charges in SOI and the interface between oxide and silicon, added electron-holes would be reduced around the partial SOI [13][14][15] . From Figs.…”