Research progress on oxide-based thin film transisitors

Lan, Linfeng; Zhang, Peng; Peng, Junbiao

doi:10.7498/aps.65.128504

Cited by 9 publications

(3 citation statements)

References 123 publications

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“…Generally, the transfer characteristics of a-IGZO TFT shift positively under the action of PBS, which is due to the negative charges trapping at the interface of a-IGZO/GI and/or into the GI. [12] However, the contrary results are observed in this study. Therefore, we propose that the dominant mechanism be due to the positive charges, which are repelled to the back-channel interface by a vertical electric field, trapping at the interface of a-IGZO/passivation and/or into the passivation.…”

Section: Resultscontrasting

confidence: 89%

“…However, the ES structure carries with it an extra mask. [12] The EMMO TFT tactfully makes a tradeoff by elevating the S/D electrodes onto the passivation, and the passivation layer plays the role of an ES layer. Next, a heat-treatment in oxygen induces n + S/D regions, which cancels the requirement for an extension of the gate electrode to underlap the S/D electrode contacts.…”

Section: Introductionmentioning

confidence: 99%

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Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors

Zhang

Wang

2017

Chinese Phys. B

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Under the action of a positive gate bias stress, a hump in the subthreshold region of the transfer characteristic is observed for the amorphous indium-gallium-zinc oxide thin film transistor, which adopts an elevated-metal metal-oxide structure. As stress time goes by, both the on-state current and the hump shift towards the negative gate-voltage direction.The humps occur at almost the same current levels for devices with different channel widths, which is attributed to the parasitic transistors located at the channel width edges. Therefore, we propose that the positive charges trapped at the backchannel interface cause the negative shift, and the origin of the hump is considered as being due to more positive charges trapped at the edges along the channel width direction. On the other hand, the hump-effect becomes more significant in a short channel device (L = 2 µm). It is proposed that the diffusion of oxygen vacancies takes place from the high concentration source/drain region to the intrinsic channel region.

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Section: Resultscontrasting

confidence: 89%

Section: Introductionmentioning

confidence: 99%

Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors

Zhang

Wang

2017

Chinese Phys. B

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“…It has been found that the performance of the TFTs is affected by various factors, while the active channel layer material is critical to fabricate high-performance TFTs [5]. Transparent oxide semiconductors (TOSs) with high-effect mobility, low off current, wide optical band gap (3.5 eV), and low-temperature fabrication (<250 °C) are considered as promising candidates of TFTs [6][7][8]. Especially, since high field-effect mobility ZnO TFT prepared at room temperature has been reported by Fortunato and Martins et al in 2004 [9], ZnO-based TFTs have attracted the most attention.…”

Section: Introductionmentioning

confidence: 99%

Impact of active layer thickness of nitrogen-doped In–Sn–Zn–O films on materials and thin film transistor performances

Yang

Chen

et al. 2018

J. Phys. D: Appl. Phys.

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Nitrogen-doped indium tin zinc oxide (ITZO:N) thin film transistors (TFTs) were deposited on SiO2 (200 nm)/p-Si〈1 0 0〉 substrates by RF magnetron sputtering at room temperature. The structural, chemical compositions, surface morphology, optical and electrical properties as a function of the active layer thickness were investigated. As the active layer thickness increases, Zn content decreases and In content increases gradually. Meanwhile, Sn content is almost unchanged. When the thickness of the active layer is more than 45 nm, the ITZO:N films become crystallized and present a crystal orientation along InN(0 0 2) plan. No matter what the thickness is, ITZO:N films always display a high transmittance above 80% in the visible region. Their optical band gaps fluctuate between 3.4 eV and 3.62 eV. Due to the dominance of low interface trap density and high carrier concentration, ITZO:N TFT shows enhanced electrical properties as the active layer thickness is 35 nm. Its field-effect mobility, on/off radio and sub-threshold swing are 17.53 cm2 V−1 · s−1, 106 and 0.36 V/dec, respectively. These results indicate that the suitable thickness of the active layer can enhance the quality of ITZO:N films and decrease the defects density of ITZO:N TFT. Thus, the properties of ITZO:N TFT can be optimized by adjusting the thickness of the active layer.

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High‐Performance Full‐Solution‐Processed Oxide Thin‐Film Transistor Arrays Fabricated by Ultrafast Scanning Diode Laser

Peng

et al. 2022

Adv Materials Inter

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On the other hand, most previous reports in solutionprocessed TFTs are focused on the nonpatterned single TFT from spin coating, which have rather large channel length (>50 µm) through the thermal evaporation that it is not suitable for the application in high-resolution active-matrix displays. [11,12] Therefore, in order to make TFT more practical for the application, the full-solution-processed TFT arrays with channel lengths of less than 10 µm must be fabricated by the photolithographic-patterned technique. Furthermore, it is also noted that solution-processed TFTs have typical disadvantages of high temperature (>400 °C), long time and high cost, [13][14][15] the alternative approach to fabricate full-solution-processed TFT array is the fast and energy-efficient postprocessing method of the ultrafast scanning diode laser annealing (USDLA), which provide a viable solution for commercialization, especially for displays and circuits.Meanwhile, the TFT devices directly expose to the atmospheric environment, the ambient water (H 2 O) and oxygen (O 2 ) that diffuse into the active layer can accelerate degradation of the device stability. [16,17] Usually, a passivation layer is used to isolate the device from the external environment to achieve the effect of blocking H 2 O and O 2 , thereby improving the stability of the device. And the silicon oxide thin films are widely used for passivation material because of its advantages, such as wide band gap, low leakage current density, and high industrial compatibility. [18][19][20][21][22] In addition, TFTs are inevitably exposed to light environment (from ambient light, the backlight of liquid crystal display panels, or self-illumination of active-matrix organic light-emitting diode), the light sensitivity of oxide TFTs should be minimized to ensure the application in practical displays. [23,24] Especially for the full-solution-processed oxide TFT remains suffering from severe bias-stress instability. [20,23,25] So, it is necessary to improve the stability under bias illumination stress for the full-solution-processed oxide TFT.Accordingly, on the basis of our previous studies for the tungsten-zinc-tin-oxide (WZTO) active layer, [26] the indium-tin-oxide (ITO) electrodes and the hafnium-aluminum-oxide (HAO) gate dielectric layers are further investigated comprehensively to The full-solution-processed oxide thin-film transistor (TFT) array is successfully realized by using ultrafast scanning diode laser annealing (USDLA). It integrates all solution-processed functional thin films well, including low-electrical-resistivity transparent conductive indium-tin-oxide (ITO) thin film, high-k dielectric hafnium-aluminum-oxide (HAO) thin film, and high-quality semiconductor tungsten-zinc-tin-oxide (WZTO) thin film. And the stacked multilayer thin films as a whole exhibit a smooth surface with the root mean square (RMS) roughness of 0.293 nm. The full-solution-processed TFT array exhibits a uniform overall TFT device performance, the average values including subthreshold swing of 11...

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Research progress on oxide-based thin film transisitors

Cited by 9 publications

References 123 publications

Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors

Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors

Impact of active layer thickness of nitrogen-doped In–Sn–Zn–O films on materials and thin film transistor performances

High‐Performance Full‐Solution‐Processed Oxide Thin‐Film Transistor Arrays Fabricated by Ultrafast Scanning Diode Laser

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