Retiming of DSP programs for optimum vectorization

Zivojnovic, V.; Ritz, S.; Meyr, H.

doi:10.1109/icassp.1994.389624

Cited by 20 publications

(18 citation statements)

References 9 publications

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“…We have also given general, tight expressions for the CBP parameters of a number of additional practical DSP building blocks, which were obtained by analyzing implementations in the DSP libraries provided within the Ptolemy design environment [32]. Useful directions for further study include investigating tools to help automate the derivation of tight CBP parameters; integrating CBP-based buffering analysis, multidimensional dataflow modeling [34], and cyclo-static dataflow principles [26], which appear to have strong synergistic inter-relationships; systematically accounting for CBP parameters in the context of memory bound derivation (derivations of efficiently-computable upper bounds on memory requirements) [8]; and understanding the impact of CBP-based buffer optimization on retiming/vectorization transformations [35][36][37] for throughput optimization under memory capacity constraints. …”

Section: Discussionmentioning

confidence: 99%

The CBP Parameter: A Module Characterization Approach for DSP Software Optimization

Bhattacharyya

Murthy

2004

The Journal of VLSI Signal Processing-Systems for Signal, Image

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Abstract. Memory consumption is an important metric for DSP software implementation. In this paper, we develop a module characterization technique that promotes more economical use of memory resources at the system level. Our work is developed in the context of software synthesis from signal/video/image processing applications expressed as synchronous dataflow (SDF) graphs. SDF is a restricted form of dataflow where each computational module (actor) consumes and produces a fixed number of data values (tokens) on each execution. Usually, no assumption is made about when during the execution of an actor, the tokens are actually consumed and produced; the firing of an actor is treated as an atomic event for most purposes. However, we show in this paper that it is possible to concisely and precisely capture key properties pertaining to the relative times at which tokens are produced and consumed by an actor. We show this by introducing the consumed-before-produced (CBP) parameter, which provides a general method for characterizing the token transfer of an SDF actor. Good bounds on the CBP parameter can aid an SDF compiler in performing more aggressive optimizations for reducing buffer sizes on the edges between actors. We formally define the CBP parameter; derive some useful properties of this parameter; illustrate how the value of the parameter is derived by examining in detail the multirate FIR filter, which is a fundamental actor in multirate signal processing applications; and examine CBP parameterizations for several other practical SDF actors.

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Section: Discussionmentioning

confidence: 99%

The CBP Parameter: A Module Characterization Approach for DSP Software Optimization

Bhattacharyya

Murthy

2004

The Journal of VLSI Signal Processing-Systems for Signal, Image

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“…For example, the retiming technique is often exercised on single-rate dataflow graphs. In the context of context switch optimization, retiming rearranges delays (initial values in the dataflow buffers) so they are better concentrated in isolated parts of the graph [8,17]. As another example, Hong et al [5] investigate throughput-constrained optimization given heterogeneous context switching costs between task pairs.…”

Section: Related Workmentioning

confidence: 99%

Memory-constrained Block Processing for DSP Software Optimization

Shen

Bhattacharyya

2007

J Sign Process Syst Sign Image

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Abstract. Digital signal processing (DSP) applications involve processing long streams of input data. It is important to take into account this form of processing when implementing embedded software for DSP systems. Task-level vectorization, or block processing, is a useful dataflow graph transformation that can significantly improve execution performance by allowing subsequences of data items to be processed through individual task invocations. In this way, several benefits can be obtained, including reduced context switch overhead, increased memory locality, improved utilization of processor pipelines, and use of more efficient DSP oriented addressing modes. On the other hand, block processing generally results in increased memory requirements since it effectively increases the sizes of the input and output values associated with processing tasks. In this paper, we investigate the memory-performance trade-off associated with block processing. We develop novel block processing algorithms that carefully take into account memory constraints to achieve efficient block processing configurations within given memory space limitations. Our experimental results indicate that these methods derive optimal memory-constrained block processing solutions most of the time. We demonstrate the advantages of our block processing techniques on practical kernel functions and applications in the DSP domain.

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“…Retiming is originally applied in [5] to reduce the iteration period of homogeneous synchronous dataflow graphs (HSDFGs), which is a special type of SDFGs. Retiming can also be used to optimize algorithms according to other criteria, such as minimizing the memory usage [2], extending the vectorization capabilities [6], and decreasing power consumption [7]. A great deal of research has been done on retiming in the context of HSDFGs [5], [8], [9], [10], [11].…”

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confidence: 99%

Efficient Retiming of Multirate DSP Algorithms

Zhu

Basten

Geilen

et al. 2012

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Multi-rate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow graphs (SDFGs). A lower iteration period implies a faster execution of a DSP algorithm. Retiming is a simple but efficient graph transformation technique for performance optimization, which can decrease the iteration period without affecting functionality. In this paper, we deal with two problems: feasible retimingretiming an SDFG to meet a given iteration period constraint; and optimal retiming -retiming an SDFG to achieve the smallest iteration period. We present a novel algorithm for feasible retiming and based on that one, a new algorithm for optimal retiming, and prove their correctness. Both methods work directly on SDFGs, without explicitly converting them to their equivalent homogeneous SDFGs (HSDFGs). Experimental results show that our methods give a significant improvement compared to the earlier methods.

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Retiming of DSP programs for optimum vectorization

Cited by 20 publications

References 9 publications

The CBP Parameter: A Module Characterization Approach for DSP Software Optimization

The CBP Parameter: A Module Characterization Approach for DSP Software Optimization

Memory-constrained Block Processing for DSP Software Optimization

Efficient Retiming of Multirate DSP Algorithms

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