Semiconductor-based memories are essential elements of today's electronics. With the upcoming Internet of Things (IoT) era, the number of interconnected devices is growing exponentially and so does the memory market. In this work, III-V single-transistor dynamic RAM cells are experimentally demonstrated for the first time. In particular, indium gallium arsenide on insulator (InGaAs-OI) transistors, operating as MSDRAM (Meta-Stable Dip RAM) cells, are analyzed for different geometries. Experimental results show different current levels for each logic state proving the successful memory behavior down to 14 nm gate length. This work confirms the feasibility of employing III-V materials to implement aggressively scaled dynamic memory cells without an external capacitor for III-V embedded applications. A significant research effort in the memory field to implement new solutions and to optimize the existing ones has been lately carried out and is still ongoing 1 . In this respect and beside Magnetoresistance RAM (MRAM) 2 , Resistive RAM (ReRAM) 3 or Phase-change memory (PCM) 4 alternatives, different dynamic RAM (DRAM) candidates have been recently proposed based on the floating-body effect (FBE) 5 : ARAM 6 , A2RAM 7-9 , MSDRAM 10 or the Z 2 - . This innovative approach allows to get rid of the external capacitor and to reduce the manufacturing complexity while simultaneously minimizing the cell footprint. All these FBEbased contenders [6][7][8][10][11][12]16,17 have been already experimentally demonstrated in silicon but there are few reports for other materials such as III-Vs yet. III-V channel materials are uniquely