Review of Basic Classes of Dividers Based on Division Algorithm

Abstract

The electronics world is very well described in two distinct but dependent interdisciplinary areas, namely hardware and software. Arithmetic operations are very vital building blocks of an electronic system. An algorithm is a systematic arrangement that helps develop a sophisticated electronic system, including hardware and software aspects. Addition, subtraction, multiplication, and division are critical elements of arithmetic implementation in the electronic system, but fewer efforts have been made to implement division than other arithmetic operations, even though the number of transistors on a chip is increasing beyond the Moore's law prediction. It is quite complicated to implement arithmetical operations; here, a sophisticated algorithm is essential to successful implementation. Technological upgrades are leading to a new paradigm of applications, where the performance of a division circuit or block is a vital and critical feature of a successful system. The lexicon of algorithms used in the implementation of the division operation in electronics systems is discussed in detail in the present article, which indicates the mathematical formulation, criticality, conversion pattern, hardware requirements, and logic used for conversion. The current report describes the broad classification of dividers into basic classes named digit recurrence, high radix, functional iteration, estimation, a look-up table, and variable latency. It also illustrates that, in practical implementation, many algorithms have been developed that combine one or many classes and are implemented with different hardware architectures. The study indicated the possibility of improving the presently available algorithms or creating a new algorithm to enhance practical implementation.

Power optimization of binary division based on FPGA

“…Arithmetic operations, such as addition, subtraction, multiplication and division, are fundamental building blocks in digital systems [7]. This paper is focused on the division operation.…”

“…Division is the most complicated and the highest-cost arithmetic operation. Unlike addition and multiplication, division does not possess associative or commutative properties [7], [33]. This makes it very difficult to implement division in digital systems.…”

“…In this algorithm, the partial remainder should always be positive. If the partial remainder is negative, the divisor is added back, which gives the operation the name 'restoring' [7], [32]. The restoring division consists of P, A, B and Q registers, which represent the n-bit accumulator register, the n-bit dividend register, the n-bit divisor register and the quotient register, respectively.…”

“…The P and A registers will be concatenated to be the PA register (in which P is the high content and A is the low content), taking into account an additional bit that should be concatenated to the most significant bit (MSB) of the PA register for the shifting operation. The steps of restoring the division algorithm are described as follows [7], [36]: 1) Initialize the 𝑃 𝑟𝑒𝑔𝑖𝑠𝑡𝑒𝑟 with zeros, the 𝐴 𝑟𝑒𝑔𝑖𝑠𝑡𝑒𝑟 with the value of the dividend, the 𝐵 𝑟𝑒𝑔𝑖𝑠𝑡𝑒𝑟 with the value of divisor, and the counter is the number of bits in the dividend. 2) Shift the concatenated 𝑃𝐴 𝑟𝑒𝑔𝑖𝑠𝑡𝑒𝑟 one-bit position to the left.…”

Low-Latency Bit-Accurate Architecture for Configurable Precision Floating-Point Division

“…Literature exists describing division algorithms, of which digit recurrence, functional iteration, variable latency, very high radix, and look-up table are five typical division implementations [3].…”