RNS-based Watermarking for IP Cores

Abstract

This paper presents a watermarking technique for Intellectual Property Protection (IPP) of circuits based on the residue number system (RNS). This technique relies on embedding a digital signature in non used cells of look-up tables of RNS-based designs at HDL design level; this enables the protection of author rights in the development and distribution of these designs as reusable modules (IP cores) in an efficient and transparent way. The embedded signature uniquely identifies both the design origin and the recipient, while being difficult to detect and/or remove, its extraction requires minimal modifications to the system. The presented IPP scheme has been implemented on a variety of FPL devices, not disrupting the functionality neither significantly degrading the performance of the example systems.

Watermarking strategies for IP protection of micro-processor cores

“…The protection at high design levels 6,11,12,13 introduces great difficulties to remove the watermark, since the signatures is embedded in preliminary stages, being dragged through the whole design flow. In addition, the watermark could be embedded as a functional part of the design 6 .…”

“…IPP@HDL 6 protects digital systems by spreading the bits of a digital signature through memory structures or combinational logic included in the high-level description of the design. Thus, the signature is propagated through the whole design flow down to the physical implementation, independently of the target technology (ASIC, FPGA, etc.).…”

“…This signature spreading does not require additional system resources. In addition, the proposed watermarking technique includes an easy and secure procedure 6 for non-destructive signature extraction. This procedure requires some hardware to be included into the system, which will detect the petition for signature extraction and will perform this task, showing the signature bits as a data sequence at the output of the protected system.…”

“…Nowadays, IP core watermarking 2,3,4 has emerged as a tool for IP core protection. Although watermarks may be inserted at different levels of the design flow, watermarking Hardware Description Language (HDL) descriptions 5,6 has been proved to be a robust and secure option. The embedding of a watermark at this design level provides the most tampering resistant schemes since the signature is embedded in preliminary stages, and it is dragged through the whole design flow 6 .…”

“…Although watermarks may be inserted at different levels of the design flow, watermarking Hardware Description Language (HDL) descriptions 5,6 has been proved to be a robust and secure option. The embedding of a watermark at this design level provides the most tampering resistant schemes since the signature is embedded in preliminary stages, and it is dragged through the whole design flow 6 . In this sense, IPP@HDL 6 procedure provides a protection framework for IP cores by spreading a digital signature at the HDL design level through memory structures or combinational logic included in the design.…”