Robust Hybrid Memristor-CMOS Memory: Modeling and Design

Mohammad, Baker; Homouz, Dirar; Elgabra, Hazem

doi:10.1109/tvlsi.2012.2227519

Cited by 66 publications

(22 citation statements)

References 20 publications

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“…Many applications have been presented based on the exponential memristor model such as in neuromorphic, 30 memristor memory cell, [30][31][32] and relaxation oscillators. 33 The exponential model defines the memristor in different way than the symmetric HP model.…”

Section: Simulations With Nonlinear Exponential Modelmentioning

confidence: 99%

A generalized family of memristor‐based voltage controlled relaxation oscillator

Hezayyin

Ahmed

Fouda

et al. 2018

Circuit Theory & Apps

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Summary Recently, memristive oscillators are a significant topic in the nonlinear circuit theory where there is a possibility to build relaxation oscillators without existence of reactive elements. In this paper, a family of voltage‐controlled memristor‐based relaxation oscillator including two memristors is presented. The operation of two memristors‐based voltage relaxation oscillator circuits is demonstrated theoretically with the mathematical analysis and with numerical simulations. The generalized expressions for the oscillation frequency and conditions are derived for different cases, where a closed form is introduced for each case. The effect of changing the circuit parameters on the oscillation frequency and conditions is investigated numerically. In addition, the derived equations are verified using several transient PSPICE simulations. The power consumption of each oscillator is obtained numerically and compared with its PSPICE counterpart. Furthermore, controlling the memristive oscillator with a voltage grants the design an extra degree of freedom which increases the design flexibility. The nonlinear exponential model of memristor is employed to prove the oscillation concept. As an application, two examples of voltage‐controlled memristor‐based relaxation oscillator are provided to elaborate the effect of the reference voltage on the output voltage. This voltage‐controlled memristor‐based relaxation oscillator has nano size with storage property that makes it more efficient compared with the conventional one. It would be helpful in many communication applications.

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Section: Simulations With Nonlinear Exponential Modelmentioning

confidence: 99%

A generalized family of memristor‐based voltage controlled relaxation oscillator

Hezayyin

Ahmed

Fouda

et al. 2018

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…Different models exist in [23] to explain the dynamical behavior of the memristor. 1) Linear [25], [26]: Linear represents the memristor in its simplest form.…”

Section: B Memristor Modelsmentioning

confidence: 99%

“…Power consumed in writing is technology dependent, while the reading process in all three technologies is capacitance based. General memory organization and memristor model are based on [23]. Reliability challenge concerned with state drift that is caused by read or write disturb may exist.…”

Section: Emerging Versus Traditional Memory Technologies Power Anmentioning

confidence: 99%

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Modeling and Optimization of Memristor and STT-RAM-Based Memory for Low-Power Applications

Halawani

Mohammad

Homouz

et al. 2016

IEEE Trans. VLSI Syst.

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Conventional charge-based memory usage in low-power applications is facing major challenges. Some of these challenges are leakage current for static random access memory (SRAM) and dynamic random access memory (DRAM), additional refresh operation for DRAM, and high programming voltage for Flash. In this paper, two emerging resistive random access memory (ReRAM) technologies are investigated, memristor and spin-transfer torque (STT)-RAM, as potential universal memory candidates to replace traditional ones. Both of these nonvolatile memories support zero leakage and lowvoltage operation during read access, which makes them ideal for devices with long sleep time. To date, high write energy for both memristor and STT-RAM is one of the major inhibitors for adopting the technologies. The primary contribution of this paper is centered on addressing the high write energy issue by trading off retention time with noise margin. In doing so, the memristor and STT-RAM power has been compared with the traditional sixtransistor-SRAM-based memory power and potential application in wireless sensor nodes is explored. This paper uses 45-nm foundry process technology data for SRAM and physics-based mathematical models derived from real devices for memristor and STT-RAM. The simulations are conducted using MATLAB and the results show a potential power savings of 87% and 77% when using memristor and STT-RAM, respectively, at 1% duty cycle.Index Terms-Duty cycle, embedded memory, low energy, low power, memristor, spin-transfer torque (STT)-RAM, wireless sensor node (WSN).

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“…This technology exists in research centers and presents issues in terms of excessive area, though it appears more promising in terms of computational power, co-integrating memory and computing. Currently available studies have been conducted along the lines of nanoelectronics, logic, [142], modeling and memory [143].…”

Section: Device Level the Memristor And Crossbar Realizationsmentioning

confidence: 99%

Neuromorphic microelectronics from devices to hardware systems and applications

Schmid

2016

NOLTA

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Neuromorphic systems aiming at mimicking some characteristics of the nervous systems of living humans or animals have been developed since the late 1980s', taking benefit of intrinsic properties and increasing performances of the successive silicon fabrication technologies. A regain of interest has been observed in the middle of the 2010s', which manifests itself from the emergence of large-scale projects integrating various computational and hardware perspectives, by the increased interest and involvement of industry and the growth of the volume of scientific publications. This paper reviews research directions and methods of neuromorphic microelectronics hardware, the developed hardware and its performance, and discusses current issues and potential future developments.

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Robust Hybrid Memristor-CMOS Memory: Modeling and Design

Cited by 66 publications

References 20 publications

A generalized family of memristor‐based voltage controlled relaxation oscillator

A generalized family of memristor‐based voltage controlled relaxation oscillator

Modeling and Optimization of Memristor and STT-RAM-Based Memory for Low-Power Applications

Neuromorphic microelectronics from devices to hardware systems and applications

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