Role of W and Mn for reliable 1X nanometer-node ultra-large-scale integration Cu interconnects proved by atom probe tomography

Shima, Keisetsu; Tu, Yuan; Shimizu, H.; Shimizu, Yasuo; Momose, Takeshi; Inoue, Koji; Nagai, Yasuyoshi; Shimogaki, Yukihiro

doi:10.1063/1.4896961

Cited by 10 publications

(4 citation statements)

References 29 publications

(38 reference statements)

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“…We previously evaluated alloy films of Co with W addition [Co(W)] formed by CVD or ALD as an alternative material to the PVD-Ta/TaN double layer, [30][31][32] because Co(W) is thought to have low resistivity and good adhesion with Cu regardless of possible impurities in the interface between Co(W) and Cu derived from ligands or byproducts of precursors. [33][34][35][36][37] In this current study, we successfully designed oxygen-free Co(W) films by thermal CVD or ALD using NH 3 and two oxygen-free precursors, namely, bis (N-tert-butyl-N -ethyl-propaneamidinato) cobalt (II) [Co(AMD) 2 ] and bis (tert-butylimino) bis (dimethylamino) tungsten (IV) (BTBMW), whose molecular structures are shown in Fig. 1.…”

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confidence: 99%

CVD and ALD Co(W) Films Using Amidinato Precursors as a Single-Layered Barrier/Liner for Next-Generation Cu-Interconnects

Shimizu

Suzuki

Nogami

et al. 2013

ECS J. Solid State Sci. Technol.

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Cobalt film with tungsten addition [Co(W)] has the potential to be an effective single-layered barrier/liner in Cu-interconnects owing to its good adhesion with Cu, a lower resistivity than TaN, and an improved barrier property with respect to cobalt films. Our previous study on chemical-vapor-deposited (CVD) Co(W) using carbonyl precursors clarified, however, that WO3 included in the films increased the resistivity. In this current study, to reduce the resistivity of Co(W), oxygen-free process for Co(W) films were designed using two oxygen-free amidinato precursors, bis(N-tert-butyl-N′-ethylpropionamidinato) cobalt and bis(tert-butylimino)bis(dimethylamino)tungsten, by chemical vapor deposition (CVD) and atomic layer deposition (ALD) at 350–400°C. Deposition process were designed by employing quantum chemical calculation, in which NH3 were chosen as a reducing reagent for the sake of the low activation energy of deposition. NH3 actually acted effective reducing reagent for Co or Co(W) deposition using amidinato precursors in our research. Co(W) films using amidinato precursors and NH3 contained no oxygen and a few amounts of nitrogen. Nitrogen, however, were easily eliminated by annealing at 400°C. Therefore, Co(W) films using amidinato precursors were so high quality to have lower resistivity than Co(W) films using carbonyl precursors or conventional PVD-TaN.

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confidence: 99%

CVD and ALD Co(W) Films Using Amidinato Precursors as a Single-Layered Barrier/Liner for Next-Generation Cu-Interconnects

Shimizu

Suzuki

Nogami

et al. 2013

ECS J. Solid State Sci. Technol.

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“…We recently observed the encapsulated structure by three-dimensional atom probe tomography method. 51 This clearly showed that stuffed grain boundaries efficiently prevented Cu diffusion. In addition, some intrinsic pin-holes in nano-meter-thick CVD/ALD-Co(W) lms could be stuffed by Mn addition in Cu seed layer for the actual application.…”

Section: Barrier Performance Against Cu Diffusionmentioning

confidence: 93%

Precursor-based designs of nano-structures and their processing for Co(W) alloy films as a single layered barrier/liner layer in future Cu-interconnect

et al. 2015

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“…135,136 This nullified the benefits of capacitance scaling by implementing increasingly difficult to integrate highly porous extreme low-k ILD materials. 102 Further, efforts to downscale the thickness of the TNT barrier [136][137][138][139] or adopt alternate metallization materials [140][141][142][143][144][145] to mitigate the resistivity impact were only exacerbated by the use of highly porous ILD materials. Similarly, continued delays in the availability of EUV lithography [146][147][148] forced the adoption of intricate pitch division/multi-patterning techniques 149,150 that multiplied the patterning induced damage and increase in k value for porous ILDs.…”

Section: The End Of Permittivity Scaling?mentioning

confidence: 99%

Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices

Jenkins

Austin

Conley

et al. 2019

ECS J. Solid State Sci. Technol.

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High-dielectric constant (high-k) gate oxides and low-dielectric constant (low-k) interlayer dielectrics (ILD) have dominated the nanoelectronic materials research scene over the past two decades, but they have recently reached a state of maturity and perhaps the limits of their scaling. Based on this, there is a need for a systematic review summarizing not only the historic research and achievements on high-k and low-k dielectrics, but also emerging device applications as well as an outlook of future challenges. We begin by first reviewing the factors that drove the emergence of low-k and high-k materials in nanoelectronics as ILD and gate dielectric materials, respectively, and the challenges and limits these materials ultimately approached in terms of permittivity scaling. We then illustrate that gate dielectric and ILD applications represent just a small fraction of the numerous dielectrics utilized in present day nanoelectronic products where permittivity scaling is now being increasingly demanded for materials such as dielectric spacers, trench isolation, and etch stopping layers. We conclude by examining the numerous new applications for dielectric materials that are emerging as the semiconductor industry transitions to novel patterning schemes, prepares for life post CMOS scaling, and explores ways to natively embed device functionality in the metal interconnect. For the former, we specifically examine the “colorful” requirements for the various enabling dielectric hardmask and spacer materials utilized in pitch division-multi-pattern processes and then discuss the role that selective area deposition of dielectrics and metals could play in reducing the complexity of such patterning processes. For the latter, we review the use of both high-k and low-k dielectrics in various metal-insulator-metal (MIM) structures as Fermi level de-pinning layers, tunnel diodes, and back-end-of-line (BEOL) compatible capacitive and resistive switching random access memory (ReRAM) elements. We further examine how dielectrics can hinder or aid new forms of computing such as quantum and neuromorphic in reaching their full potential. In conclusion, we find that while the field of dielectrics has a long history, it remains vibrant with numerous exciting new and old research vectors awaiting further exploration.

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Role of W and Mn for reliable 1X nanometer-node ultra-large-scale integration Cu interconnects proved by atom probe tomography

Abstract: Experimental characterization and modeling of the reliability of three-terminal dual-damascene Cu interconnect trees

Cited by 10 publications

References 29 publications

CVD and ALD Co(W) Films Using Amidinato Precursors as a Single-Layered Barrier/Liner for Next-Generation Cu-Interconnects

CVD and ALD Co(W) Films Using Amidinato Precursors as a Single-Layered Barrier/Liner for Next-Generation Cu-Interconnects

Precursor-based designs of nano-structures and their processing for Co(W) alloy films as a single layered barrier/liner layer in future Cu-interconnect

Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices

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