Room-temperature bonding of GaN and diamond via a SiC layer

Kobayashi, Ayaka; Tomiyama, Hazuki; Ohno, Yutaka; Shimizu, Yasuo; Nagai, Y.; Shigekawa, Naoteru; Liang, Jianbo

doi:10.1080/26941112.2022.2145508

Cited by 8 publications

(3 citation statements)

References 33 publications

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“…This process caused the amorphous SiC to transform into a crystalline structure. The phenomenon of recrystallization in the amorphous layer induced by plasma irradiation has been demonstrated in previous studies, [ 19,45,53 ] and it is a well‐known phenomenon. Second, after annealing, a new SiC layer formed through the reaction between Si and carbon atoms.…”

Section: Resultsmentioning

confidence: 87%

“…The increasing miniaturization and integration of semiconductor devices, as well as the increasing adoption of Artificial Intelligence (AI) and 5th Generation (5G) communication technology, structure has been developed by either removing Si from the GaN-on-Si substrate and depositing diamond on the exposed GaN surface using a dielectric material transition layer such as SiNx or AlN, [13,15,16] or removing Si from the GaN-on-Si substrate and bonding it to a diamond substrate using an adhesion layer such as metal, Si, and SiC. [17][18][19] Although a 4-inch GaNon-diamond wafer has been achieved in the former case, [20] the transition layer contributed to a large thermal resistance due to its lower thermal conductivity, and the low crystal quality of the diamond deposited on the transition layer resulted in low thermal conductivity, [21,22] which prevents the desired thermal management from being achieved. In the latter case, the "device first" concept was used, [23,24] which involves fabricating the GaN devices on a Si substrate and then bonding the GaN to the diamond substrate at high temperature.…”

Section: Introductionmentioning

confidence: 99%

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High Thermal Stability and Low Thermal Resistance of Large Area GaN/3C‐SiC/Diamond Junctions for Practical Device Processes

Kagawa,

Cheng,

Kawamura

et al. 2023

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Thermal management is critical in contemporary electronic systems, and integrating diamond with semiconductors offers the most promising solution to improve heat dissipation. However, developing a technique that can fully exploit the high thermal conductivity of diamond, withstand high‐temperature annealing processes, and enable mass production is a significant challenge. In this study, the successful transfer of AlGaN/GaN/3C‐SiC layers grown on Si to a large‐size diamond substrate is demonstrated, followed by the fabrication of GaN high electron mobility transistors (HEMTs) on the diamond. Notably, no exfoliation of 3C‐SiC/diamond bonding interfaces is observed even after annealing at 1100 °C, which is essential for high‐quality GaN crystal growth on the diamond. The thermal boundary conductance of the 3C‐SiC‐diamond interface reaches ≈55 MW m−2 K−1, which is efficient for device cooling. GaN HEMTs fabricated on the diamond substrate exhibit the highest maximum drain current and the lowest surface temperature compared to those on Si and SiC substrates. Furthermore, the device thermal resistance of GaN HEMTs on the diamond substrate is significantly reduced compared to those on SiC substrates. These results indicate that the GaN/3C‐SiC on diamond technique has the potential to revolutionize the development of power and radio‐frequency electronics with improved thermal management capabilities.

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Section: Resultsmentioning

confidence: 87%

Section: Introductionmentioning

confidence: 99%

High Thermal Stability and Low Thermal Resistance of Large Area GaN/3C‐SiC/Diamond Junctions for Practical Device Processes

Kagawa,

Cheng,

Kawamura

et al. 2023

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“…27−29 Similarly demonstrated GaN/diamond systems using the surface activated bonding (SAB) method, which relies on the use of ultrahigh vacuum along with a dedicated SAB tool and modified Ar plasma sources to facilitate bonding, have been focused on thin GaN layers for lateral device integration. 11,24,30 Recently, Matsumae et al demonstrated GaN/diamond bonding using chemical surface treatments along with compression bonding in atmospheric conditions at room temperature. 28 However, despite these advancements, our approach here is unique in that it facilitates relatively lowcost and less complex die-and wafer-scale bonding (ideal for lowvolume manufacturing) while maintaining the back-side drain contact needed for vertical device architectures.…”

Section: Fabricationmentioning

confidence: 99%

Thermal Transport and Mechanical Stress Mapping of a Compression Bonded GaN/Diamond Interface for Vertical Power Devices

Delmas,

Jarzembski,

Bahr

et al. 2024

ACS Appl. Mater. Interfaces

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Bonding diamond to the back side of gallium nitride (GaN) electronics has been shown to improve thermal management in lateral devices; however, engineering challenges remain with the bonding process and characterizing the bond quality for vertical device architectures. Here, integration of these two materials is achieved by room-temperature compression bonding centimeter-scale GaN and a diamond die via an intermetallic bonding layer of Ti/Au. Recent attempts at GaN/diamond bonding have utilized a modified surface activation bonding (SAB) method, which requires Ar fast atom bombardment immediately followed by bonding within the same tool under ultrahigh vacuum (UHV) conditions. The method presented here does not require a dedicated SAB tool yet still achieves bonding via a room-temperature metal−metal compression process. Imaging of the buried interface and the total bonding area is achieved via transmission electron microscopy (TEM) and confocal acoustic scanning microscopy (C-SAM), respectively. The thermal transport quality of the bond is extracted from spatially resolved frequency-domain thermoreflectance (FDTR) with the bonded areas boasting a thermal boundary conductance of >100 MW/m 2 •K. Additionally, Raman maps of GaN near the GaN−diamond interface reveal a low level of compressive stress, <80 MPa, in well-bonded regions. FDTR and Raman were coutilized to map these buried interfaces and revealed some poor thermally bonded areas bordered by high-stress regions, highlighting the importance of spatial sampling for a complete picture of bond quality. Overall, this work demonstrates a novel method for thermal management in vertical GaN devices that maintains low intrinsic stresses while boasting high thermal boundary conductances.

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Direct Bonding of Diamond and Dissimilar Materials for Fabricating High Performace Power Devices

Liang,

Shigekawa

2024

Topics in Applied Physics

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Room-temperature bonding of GaN and diamond via a SiC layer

Cited by 8 publications

References 33 publications

High Thermal Stability and Low Thermal Resistance of Large Area GaN/3C‐SiC/Diamond Junctions for Practical Device Processes

High Thermal Stability and Low Thermal Resistance of Large Area GaN/3C‐SiC/Diamond Junctions for Practical Device Processes

Thermal Transport and Mechanical Stress Mapping of a Compression Bonded GaN/Diamond Interface for Vertical Power Devices

Direct Bonding of Diamond and Dissimilar Materials for Fabricating High Performace Power Devices

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