Roundoff Error Analysis of the Fast Fourier Transform

Ramos, George U.

doi:10.2307/2004342

Cited by 16 publications

(15 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…While roundoff has traditionally been analyzed via a probabilistic model [42], it is not at all random (the magnitude of numerical error at the output of a finite-precision computation is a deterministic function of the inputs [43]). TPAD for FFT circuits allows the designer to specify an acceptable level T for numerical errors (which can be chosen based on the specifics of the arithmetic implementation).…”

Section: B Fast Fourier Transform Enginementioning

confidence: 99%

“…However, since the FFT engine (like many arithmetic circuits in general [44]) is implemented with floating-point arithmetic, roundoff errors could corrupt the output, leading to many false positive Trojan detection outcomes. Hence, CED techniques that use comparisons of floating-point numbers to detect Trojans must have a way of distinguishing between errors due to finite-precision effects and errors due to attacks.While roundoff has traditionally been analyzed via a probabilistic model [42], it is not at all random (the magnitude of numerical error at the output of a finite-precision computation is a deterministic function of the inputs [43]). TPAD for FFT circuits allows the designer to specify an acceptable level T for numerical errors (which can be chosen based on the specifics of the arithmetic implementation).…”

mentioning

confidence: 99%

See 1 more Smart Citation

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Abstract-There are increasing concerns about possible malicious modifications of integrated circuits (ICs) used in critical applications. Such attacks are often referred to as hardware Trojans. While many techniques focus on hardware Trojan detection during IC testing, it is still possible for attacks to go undetected. Using a combination of new design techniques and new memory technologies, we present a new approach that detects a wide variety of hardware Trojans during IC testing and also during system operation in the field. Our approach can also prevent a wide variety of attacks during synthesis, place-and-route, and fabrication of ICs. It can be applied to any digital system, and can be tuned for both traditional and split-manufacturing methods. We demonstrate its applicability for both ASICs and FPGAs. Using fabricated test chips with Trojan emulation capabilities and also using simulations, we demonstrate: 1. The area and power costs of our approach can range between 7.4-165% and 0.07-60%, respectively, depending on the design and the attacks targeted; 2. The speed impact can be minimal (close to 0%); 3. Our approach can detect 99.998% of Trojans (emulated using test chips) that do not require detailed knowledge of the design being attacked; 4. Our approach can prevent 99.98% of specific attacks (simulated) that utilize detailed knowledge of the design being attacked (e.g., through reverse-engineering). 5. Our approach never produces any false positives, i.e., it does not report attacks when the IC operates correctly. I. INTRODUCTION HERE is growing concern about the trustworthiness of integrated circuits (ICs). If an untrusted party fabricates an IC, there is potential for an adversary to insert a malicious hardware Trojan [1], an unauthorized modification of the IC resulting in incorrect functionality and/or sensitive data being exposed [2]. These include (but are not limited to) [3]: a) Modification of functional behavior through logic changes: Index TermsFor example, extra logic gates may be inserted to force an incorrect logic value on a wire at some (arbitrary) point in time (Fig. 1a) [2]. b) Electrical modification: For example, extra capacitive loading may be placed on a circuit path to alter timing characteristics of the IC (Fig. 1b) [2]. c) Reliability degradation: For example, aging of transistors (e.g., Negative Bias Temperature Instability (NBTI)) may be accelerated, degrading reliability ( Fig. 1c) [4]. A hardware Trojan is detected when we report malicious modifications to an IC. A hardware Trojan is prevented when Manuscript received January 9, 2015; revised May 8, 2015; accepted July 20, 2015. Work supported by IARPA Trusted Integrated Chips (TIC) Program. All authors are with Dept. of Electrical Engineering, Stanford University, Stanford, CA 94305 USA (e-mail: tonyfwu@stanford.edu). S. Mitra is also with Dept. of Computer Science, Stanford University.we stop a hardware Trojan from being inserted. Part of the challenge in detecting or preventing hardware Trojans arises from the fact that...

show abstract

Section: B Fast Fourier Transform Enginementioning

confidence: 99%

mentioning

confidence: 99%

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…For example, the efficient access to the memory was an important issue in 1970s [56] just as it is today [21,23]. Another problem to be considered is the numerical precision [57].…”

Section: Fast Convolutionmentioning

confidence: 99%

Algorithms for Efficient Computation of Convolution

Karas¹,

Svoboda²

2013

Design and Architectures for Digital Signal Processing

View full text Add to dashboard Cite

“…with mean pa and variance <T2, we derive the following bounds on the expected value of the accompanying linear form for addition: (9) .…”

Section: Stochastic Roundoff Error Analysis 573mentioning

confidence: 99%

“…Owing to the dimensions of the vectors involved and to the need for repeated computations, the direct evaluation of the convolution product is usually prohibitively expensive [8]. While some studies of the rounding error for the fast Fourier transform can be found in the literature (see [2,6,7,9,12,14]), the issue of the numerical stability of circular convolution is only briefly addressed in [6].…”

Section: Introductionmentioning

confidence: 99%

A Stochastic Roundoff Error Analysis for the Convolution

Calvetti¹

1992

Mathematics of Computation

View full text Add to dashboard Cite

Abstract. We study the accuracy of an algorithm which computes the convolution via Radix-2 fast Fourier transforms. Upper bounds are derived for the expected value and the variance of the accompanying linear forms in terms of the expected value and variance of the relative roundoff errors for the elementary operations of addition and multiplication. These results are compared with the corresponding ones for two algorithms computing the convolution directly, via Homer's sums and using cascade summation, respectively.

show abstract

Roundoff Error Analysis of the Fast Fourier Transform

Cited by 16 publications

References 6 publications

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Algorithms for Efficient Computation of Convolution

A Stochastic Roundoff Error Analysis for the Convolution

Contact Info

Product

Resources

About