Routing of asynchronous Clos networks

Abstract

Abstract-Clos networks provide the theoretically optimal solution to build high-radix switches. Dynamically reconfiguring a three-stage Clos network is more difficult in asynchronous circuits than in synchronous circuits. This paper proposes a novel asynchronous dispatching (AD) algorithm for general three-stage Clos networks. It is compared with the classic synchronous concurrent round-robin dispatching (CRRD) algorithm in unbuffered Clos networks. The AD algorithm avoids the contention in central modules (CMs) using a state feedback scheme and outperforms the throughput of CRRD in behavioural simulations.Two asynchronous Clos networks using the AD algorithm are implemented and compared with a synchronous Clos network using the CRRD algorithm. The asynchronous Clos scheduler is smaller than its synchronous counterpart. Synchronous Clos networks achieve higher throughput than asynchronous Clos networks because asynchronous Clos networks cannot hide the arbitration latency and their data paths are slow. The asynchronous Clos scheduler consumes significantly lower power than the synchronous scheduler and the asynchronous Clos network using bundled-data data switches shows the best power efficiency in all implementations.

Area efficient asynchronous SDM routers using 2-stage Clos switches

“…The time and implementation overhead of optimal algorithms is normally intolerable for hardware reconfigured Clos switches. In this paper, the asynchronous heuristic algorithm proposed in [12] is used to dynamically reconfigure the 2-stage Clos switch.…”

“…Fig. 6 demonstrates the structure of the Clos scheduler, which is reduced from the scheduler [12] proposed for asynchronous 3-stage Clos switches. It receives the routing requests (rt r) from all input virtual circuits, allocates a path for each active request and produces the ack (rt ra) to the input virtual circuit once the path is configured.…”

“…It receives the routing requests (rt r) from all input virtual circuits, allocates a path for each active request and produces the ack (rt ra) to the input virtual circuit once the path is configured. Running a heuristic dispatching algorithm [12], the scheduler adopts a distributed structure where each switching module has its own scheduler: IM schedulers (IMSCHs) and CM schedulers (CMSCHs).…”

“…Similar to a crossbar, a 2-stage Clos switch must be reconfigured dynamically. A Clos scheduler, simplified from the one used in an asynchronous 3-stage Clos switch [12], is implemented in each router.…”