Safe optimisations for shared-memory concurrent programs

Ševčík, Jaroslav

doi:10.1145/1993498.1993534

Cited by 39 publications

(10 citation statements)

References 16 publications

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“…Sevčík showed that a large class of elimination and reordering transformations are correct (that is, do not introduce any new behaviour when the optimised code is put in an arbitrary data-race free context) in an idealised DRF model [17,19]. In this section we adapt and extend his results to optimise non-atomic accesses in the C11/C++11 memory model.…”

Section: Sound Optimisations In the C Memory Modelmentioning

confidence: 84%

“…Building on the work byŠevčík [17,19] for an idealised DRF model, our first contribution is the study and correctness proof of several criteria for sound optimisations in the C11/C++11 model, covering all the optimisations we observed in testing real compilers (with the exception of irrelevant read introductions and merging of accesses), presented in Section 3. The second contribution of this work is a strategy to perform differential testing of compilers against a memory model, reducing the hard problem of hunting concurrency compiler bugs to matching memory traces realised by sequential code.…”

Section: Random Testing For Concurrency Compiler Bugsmentioning

confidence: 99%

“…This program transformation sounds harmless but it can introduce data races and does not lend itself to a theorem analogous to those for eliminations and reorderings. Worse than that, if combined with DRF-friendly optimisations it can introduce unexpected behaviours [19]. We conjecture that a soundness property can be stated relating the source semantics to the actual hardware behaviour, along the lines of: if an opsem O is obtained from an opsem O by introducing irrelevant reads, and it is then compiled naively following the standard compilation schemes for a given architecture [15,23], then all the behaviours observable on the architecture are allowed by the original opsem.…”

Section: Introductions Of Actionsmentioning

confidence: 99%

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Compiler testing via a theory of sound optimisations in the C11/C++11 memory model

Morisset

Pawan

Nardelli

2013

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation

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International audienceCompilers sometimes generate correct sequential code but break the concurrency memory model of the programming language: these subtle compiler bugs are observable only when the miscompiled functions interact with concurrent contexts, making them particularly hard to detect. In this work we design a strategy to reduce the hard problem of hunting concurrency compiler bugs to differential testing of sequential code and build a tool that puts this strategy to work. Our first contribution is a theory of sound optimisations in the C11/C++11 memory model, covering most of the optimisations we have observed in real compilers and validating the claim that common compiler optimisations are sound in the C11/C++11 memory model. Our second contribution is to show how, building on this theory, concurrency compiler bugs can be identified by comparing the memory trace of compiled code against a reference memory trace for the source code. Our tool identified several mistaken write introductions and other unexpected behaviours in the latest release of the gcc compiler

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Section: Sound Optimisations In the C Memory Modelmentioning

confidence: 84%

Section: Random Testing For Concurrency Compiler Bugsmentioning

confidence: 99%

Section: Introductions Of Actionsmentioning

confidence: 99%

See 1 more Smart Citation

Compiler testing via a theory of sound optimisations in the C11/C++11 memory model

Morisset

Pawan

Nardelli

2013

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation

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“…Transformations are however defined semantically. This gap is filled in [33] where the program transformations are proved to be correct, but this is done under a DRF assumption. [33] also identifies the need for characterizing memory models in terms of the transformations they permit, and this is the goal of the axiomatic formalization of BMM.…”

Section: Related Workmentioning

confidence: 99%

Plan B

Demange

Laporte

Zhao

et al. 2013

Proceedings of the 40th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages

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Recent advances in verification have made it possible to envision trusted implementations of real-world languages. Java with its type-safety and fully specified semantics would appear to be an ideal candidate; yet, the complexity of the translation steps used in production virtual machines have made it a challenging target for verifying compiler technology. One of Java's key innovations, its memory model, poses significant obstacles to such an endeavor. The Java Memory Model is an ambitious attempt at specifying the behavior of multithreaded programs in a portable, hardware agnostic, way. While experts have an intuitive grasp of the properties that the model should enjoy, the specification is complex and not well-suited for integration within a verifying compiler infrastructure. Moreover, the specification is given in an axiomatic style that is distant from the intuitive reordering-based reasonings traditionally used to justify or rule out behaviors, and ill suited to the kind of operational reasoning one would expect to employ in a compiler. This paper takes a step back, and introduces a Buffered Memory Model (BMM) for Java. We choose a pragmatic point in the design space sacrificing generality in favor of a model that is fully characterized in terms of the reorderings it allows, amenable to formal reasoning, and which can be efficiently applied to a specific hardware family, namely x86 multiprocessors. Although the BMM restricts the reorderings compilers are allowed to perform, it serves as the key enabling device to achieving a verification pathway from bytecode to machine instructions. Despite its restrictions, we show that it is backwards compatible with the Java Memory Model and that it does not cripple performance on TSO architectures.

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“…The compiler can itself induce SCVs with certain optimizations [30]. However, Volition is a pure hardware scheme and, as a result, is not able to detect those.…”

Section: Design Goals and Basic Assumptionsmentioning

confidence: 99%

Volition

Qian

Torrellas

Sahelices

et al. 2013

Proceedings of the Eighteenth International Conference on Architectural Support for Programming Languages and Operating Systems

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Sequential Consistency (SC) is the most intuitive memory model, and SC Violations (SCVs) produce unintuitive, typically incorrect executions. Most prior SCV detection schemes have used data races as proxies for SCVs, which is highly imprecise. Other schemes that have targeted data-race cycles are either too conservative or are designed only for two-processor cycles and snoopy-based systems.This paper presents Volition, the first hardware scheme that detects SCVs in a relaxed-consistency machine precisely, in a scalable manner, and for an arbitrary number of processors in the cycle. Volition leverages cache coherence protocol transactions to dynamically detect cycles in memory-access orders across threads. When a cycle is about to occur, an exception is triggered. Volition can be used in both directory-and snoopy-based coherence protocols. Our simulations of Volition in a 64-processor multicore with directorybased coherence running SPLASH-2 and Parsec programs shows that Volition induces negligible traffic and execution overhead. In addition, it can detect SCVs with several processors. Volition is suitable for on-the-fly use.

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Safe optimisations for shared-memory concurrent programs

Cited by 39 publications

References 16 publications

Compiler testing via a theory of sound optimisations in the C11/C++11 memory model

Compiler testing via a theory of sound optimisations in the C11/C++11 memory model

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Volition

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