Scalable IC Platform for Smart Cameras

Abstract

<p/> <p>Smart cameras are among the emerging new fields of electronics. The points of interest are in the application areas, software and IC development. In order to reduce cost, it is worthwhile to invest in a single architecture that can be scaled for the various application areas in performance (and resulting power consumption). In this paper, we show that the combination of an SIMD (single-instruction multiple-data) processor and a general-purpose DSP is very advantageous for the image processing tasks encountered in smart cameras. While the SIMD processor gives the very high performance necessary by exploiting the inherent data parallelism found in the pixel crunching part of the algorithms, the DSP offers a friendly approach to the more complex tasks. The paper continues to motivate that SIMD processors have very convenient scaling properties in silicon, making the complete, SIMD-DSP architecture suitable for different application areas without changing the software suite. Analysis of the changes in power consumption due to scaling shows that for typical image processing tasks, it is beneficial to scale the SIMD processor to use the maximum level of parallelism available in the algorithm if the IC supply voltage can be lowered. If silicon cost is of importance, the parallelism of the processor should be scaled to just reach the desired performance given the speed of the silicon.</p

Intelligent camera cloud computing

“…This paper proposes a technique where the feature extraction is performed within each single camera [3] [4], where upon the server inspects the feature values to come with a consolidated decision [9]. Figure 3 shows the principle of operation.…”

“…As a consequence, any changes in the application will not induce a major effort as long as they can still be expressed in the available functions. In a typical Wica system [4], the foundation will be handled by the 8051 controller, while the processing is performed by the IC3D intelligent vision processing chip. The application layer is available on each camera, but only one of the cameras in the dynamically configured network will function as the cloud server [9].…”

“…Anafocus has added basic image processing hardware in analog circuitry to the focal plane sensor that extracts features rather than communicate full image [3]. On the other hand, NXP has created an image processor that performs lengthy operations on double-buffered image lines to reduce the bandwidth requirements [4]. Both directions aim for a vision sensor that has more intelligence and can perform a number of basic operations within the camera itself.…”