2017
DOI: 10.21817/ijet/2017/v9i1/170902322
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Scaling Effect on Parameters of HfO2 Based CSDG MOSFET

Abstract: -To make obvious the advantages of Nanoelectronic circuits with addition of functionality and chip density compared to the simple switch, application of cylindrical surrounding double-gate (CSDG) MOSFET is suitable. In addition to the Silicon-dioxide, in this present work, a high dielectric material (HfO 2 ) has been added. Various parameters such as scaling of device, thermal effect, ON-resistance and capacitances, equivalent oxide thickness, capacitance equivalent thickness, and breakdown of a CSDG MOSFET ha… Show more

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Cited by 10 publications
(3 citation statements)
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“…The double-gate MOSFET with InN/La2O3 makes the entire circuit board enough to withstand all the Short Channel effects (SCEs) and hence improves the Drain Induced Barrier Lowering (DIBL) effect. The small difference in the drain current in the proposed design when compared to conventional MOSFET is due to the finite mesh of the drift-diffusion model in the simulator [7,19]. Fig.…”
Section: Analysis Of Proposed Model and Its Discussionmentioning
confidence: 99%
See 1 more Smart Citation
“…The double-gate MOSFET with InN/La2O3 makes the entire circuit board enough to withstand all the Short Channel effects (SCEs) and hence improves the Drain Induced Barrier Lowering (DIBL) effect. The small difference in the drain current in the proposed design when compared to conventional MOSFET is due to the finite mesh of the drift-diffusion model in the simulator [7,19]. Fig.…”
Section: Analysis Of Proposed Model and Its Discussionmentioning
confidence: 99%
“…The InN material has a very low bandgap of approximately 0.7 eV under ultraviolet and infrared regions. The InN is a Wurtzite hexagonal crystal of electron mobility of fewer than 3200 cm 2 V -1 s -1 and electron diffusion coefficient of 80 cm 2 s -1 [6,7].…”
Section: Introductionmentioning
confidence: 99%
“…The InGaAs MOSFET designs are widely analyzed and investigations were carried out for low power and high-speed applications [3][4][5][6]. The re-grown method for constructing the source and drain terminals paves way for low power due to small ohmic contact long the area of the terminals [7][8][9][10] with greater doping in the material bulk and the larger distance between source and drain contact terminals. The larger parasitic capacitance in the source and drain terminal attenuates the frequency performance of the MOSFET device, due to the presence of high-ƙ dielectric material between the gate terminal and the re-grown source & drain contact terminals.…”
Section: Introductionmentioning
confidence: 99%