Scheduling Multiple Multithreaded Applications on Asymmetric and Symmetric Chip Multiprocessors

Abstract

Abstract-This paper evaluates new techniques to improve performance, fairness and jitter of workloads consisting of multiple multithreaded applications running on Chip MultiProcessors (CMP). Current thread assignment techniques which are tailored for single-thread applications result in sub-optimal usage of the multiprocessor resources, unfairness between applications and jitter in execution runtimes when dealing with multiple multithreaded applications running in parallel. Multithreaded applications contain serial phases (single thread) and parallel phases (many threads). In this paper, we propose a new thread assignment mechanism that takes into account the different requirements of each phase, granting higher priority to applications during their critical-serial phases. Analytic and experimental evaluation of the proposed thread assignment mechanism on both symmetric and asymmetric multiprocessors show throughput improvements by as much as 16%, improved fairness by as much as 26% and reduced jitter by as much as 88%.

Utility-based acceleration of multithreaded applications on asymmetric CMPs

“…We run each application with the optimal number of threads found when running alone. When the sum of the optimal number of threads for all applications is greater than Mechanism Description ACMP Serial portion runs on a large core, parallel portion runs on all cores [3,15,16]. AGETS Age-based Scheduling algorithm for a single multithreaded application as described in [13].…”

“…Second, if the lagging thread starts waiting for a critical section that is not being accelerated, there is a situation where a large core is waiting for a small Structure Purpose Location and entry structure (field sizes in bits in parenthesis) Cost Thread Table (TT) To track threads, identify lagging threads and compute their Utility of Acceleration LTI unit, one entry per HW thread (52 in this example CMP configurations with area equivalent to N small cores: LC large cores, SC = N − 4 × LC small cores. ACMP [15,16] A large core always runs any single-threaded code. Max number of threads is SC + LC.…”

“…Annavaram et al [3] use frequency throttling, Morad et al use the large core of an ACMP for a single application [15] and for multiple applications [16]. Suleman et al [24] accelerate critical sections on a large core of an ACMP.…”

“…These proposals accelerate only specific bottlenecks, improving performance of applications that are limited by those bottlenecks, but do not take advantage of the large cores of an ACMP for applications that do not have the bottlenecks that they target. Additionally, these proposals are not designed to accelerate bottlenecks from multiple applications, except for [16], which is limited to serial bottlenecks. In contrast, our proposal always accelerates code segments, either bottlenecks or lagging threads, fully utilizing any number of large cores to improve performance of any kind of single and multiple applications.…”

Task Scheduling Based On Thread Essence and Resource Limitations

“…Morad et al [18] suggest scheduling threads based on their application's phase, whether serial or parallel. All of the above mentioned thread attributes have an effect on the performance of the scheduler.…”