Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing

Abstract

International audienceParallelization of Digital Signal Processing (DSP) software is an important trend in Multiprocessor System-on-Chip (MPSoC) implementation. The performance of DSP systems composed of parallelized computations depends on the scheduling technique, which must in general allocate computation and communication resources for competing tasks, and ensure that data dependencies are satisfied. In this paper, we formulate a new type of parallel task scheduling problem called Parallel Actor Scheduling (PAS) for MPSoC mapping of DSP systems that are represented as Synchronous Dataflow (SDF) graphs. In contrast to traditional SDF-based scheduling techniques, which focus on exploiting graph level (inter-actor) parallelism, the PAS problem targets the integrated exploitation of both intra- and inter-actor parallelism for platforms in which individual actors can be parallelized across multiple processing units. We first address a special case of the PAS problem in which all of the actors in the DSP application or subsystem being optimized are parallel actors (i.e., they can be parallelized to exploit multiple cores). For this special case, we develop and experimentally evaluate a two-phase scheduling framework with three work flows that involve particle swarm optimization (PSO) — PSO with a mixed integer programming formulation, PSO with simulated annealing, and PSO with a fast heuristic based on list scheduling. Then, we extend our scheduling framework to support the general PAS problem, which considers both parallel actors and sequential actors (actors that cannot be parallelized) in an integrated manner. We demonstrate that our PAS-targeted scheduling framework provides a useful range of trade-offs between synthesis time requirements and the quality of the derived solutions. We also demonstrate the performance of our scheduling framework from two aspects: simulations on a diverse set of randomly generated SDF graphs, and implementations of an image processing application and a software defined radio benchmark on a state-of-the-art multicore DSP platform

Multiconstraint Static Scheduling of Synchronous Dataflow Graphs Via Retiming and Unfolding

“…Heuristic methods to schedule and map a DAG, or a task graph, while minimizing its makespan are comprehensively surveyed in [20]. [21] optimizes the makespan of a given acyclic HSDFG, considering data parallelisms (by allowing a firing to be executed across more than one processors) as well as task parallelism. Exact methods using complete search techniques such as integer linear programming and model checking have also been studied [22] [23].…”

Algorithms and Framework for Energy Efficient Parallel Stream Computing on Many-Core Architectures

“…SCHEDULING the crown structure that further restricts the mapping of tasks to all cores within exactly one predefined group of cores. Zhou et al [148] schedules dataflow actors with intra-and iter-actors parallelism (i.e. moldable tasks) for multi-core architectures, including ILP, simulated annealing and a heuristic based on List Scheduling.…”

“…Pelcat et al [115] propose PREESM, an integrated environment for Synchronous DataFlow programing for DSPs. Recently, they added support for moldable tasks scheduling [148] but not for frequency scaling. Many other streaming languages have been developed, such as Steamit [48].…”