Scheduling Weakly Consistent C Concurrency for Reconfigurable Hardware

Abstract

Abstract-Lock-free algorithms, in which threads synchronise not via coarse-grained mutual exclusion but via fine-grained atomic operations ('atomics'), have been shown empirically to be the fastest class of multi-threaded algorithms in the realm of conventional processors. This article explores how these algorithms can be compiled from C to reconfigurable hardware via high-level synthesis (HLS).We focus on the scheduling problem, in which software instructions are assigned to hardware clock cycles. We first show that typical HLS scheduling constraints are insufficient to implement atomics, because they permit some instruction reorderings that, though sound in a single-threaded context, demonstrably cause erroneous results when synthesising multithreaded programs. We then show that correct behaviour can be restored by imposing additional intra-thread constraints among the memory operations. In addition, we show that we can support the pipelining of loops containing atomics by injecting further inter-iteration constraints. We implement our approach on two constraint-based scheduling HLS tools: LegUp 4.0 and LegUp 5.1. We extend both tools to support two memory models that are capable of synthesising atomics correctly. The first memory model only supports sequentially consistent (SC) atomics and the second supports weakly consistent ('weak') atomics as defined by the 2011 revision of the C standard. Weak atomics necessitate fewer constraints than SC atomics, but suffice for many multithreaded algorithms. We confirm, via automatic model-checking, that we correctly implement the semantics in accordance with the C standard. A case study on a circular buffer suggests that on average circuits synthesised from programs that schedule atomics correctly can be 6x faster than an existing lock-based implementation of atomics, that weak atomics can yield a further 1.3x speedup, and that pipelining can yield a further 1.3x speedup.

Global Analysis of C Concurrency in High-Level Synthesis

“…Therefore, to ensure that our analysis is valid, we turn to automated tool support. We use the Alloy model checker [5], which has been successfully employed to validate other compiler mappings and optimisations in a weakly consistent setting [28], [3].…”

“…An atomic operation must appear to be instantaneous to all threads and must also obey ordering constraints given by the C memory model [2]. Ramanathan et al [3] showed that atomics can be implemented via HLS by injecting additional scheduling constraints within each thread. Following the standard practice of conventional compilers, memory constraints were determined locally, i.e.…”

“…We implement our global analysis as an LLVM pass in the LegUp 5.1 HLS tool [4] and evaluate our implementation against thread-local analysis [3]. Since the C memory model is notoriously complicated, we formally verify our analysis to ensure the correctness of our generated hardware.…”

“…In this article, we do not make this assumption. Hence, we discuss the necessary steps to support pipelining within global analysis and evaluate the effects of pipelined global analysis on our benchmarks, compared to pipelined threadlocal analysis [3]. Furthermore, pipelined global analysis is critical in our case study since it improves streaming.…”

Precise Pointer Analysis in High-Level Synthesis

“…Séméria et al [24] and Zhu et al [13] claim to support precise pointer analysis within HLS but they do not evaluate the impact of precision on hardware quality or analysis times, both of which we address. Recent HLS works on synthesising pointer-manipulating programs [25], [26], atomic pointers [27], [28] and dynamic memory allocation [29]- [32] are examples of non-trivial use of pointers, which will increase the need for emphasis on points-to precision in the future.…”