2012
DOI: 10.1587/elex.9.200
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SCR-based ESD protection device with low trigger and high robustness for I/O clamp

Abstract: This paper presents a novel silicon controlled rectifier (SCR)-based ESD protection device with a low trigger voltage and high robustness for I/O clamp. The low trigger voltage is achieved by injecting the trigger current into main SCR. We measured the I-V characteristics, leakage current analysis and ESD robustness characteristics. The proposed ESD protection circuit was validated using a transmission line pulse (TLP) system. From the experimental results, the proposed ESD protection device has a lower trigge… Show more

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Cited by 5 publications
(4 citation statements)
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“…In this paper, the ESD protection circuit-embedded case and the diode-embedded case were divided into measurements. Since the ESD protection circuit used in this paper is used as a 5 V class protection circuit, if a diode is used, more than eight diodes are required, which reduces the area efficiency [23]. In addition, the diode can withstand more than HBM 2 KV depending on the area, but for a more accurate comparison, a diode with a similar area to the embedded ESD protection circuit is embedded.…”
Section: Measurement Resultsmentioning
confidence: 99%
“…In this paper, the ESD protection circuit-embedded case and the diode-embedded case were divided into measurements. Since the ESD protection circuit used in this paper is used as a 5 V class protection circuit, if a diode is used, more than eight diodes are required, which reduces the area efficiency [23]. In addition, the diode can withstand more than HBM 2 KV depending on the area, but for a more accurate comparison, a diode with a similar area to the embedded ESD protection circuit is embedded.…”
Section: Measurement Resultsmentioning
confidence: 99%
“…The proposed design consists of D P1 , D P2 , D N1 , D N2 , D T1 , D T2 , and SCR. The four layers of P+, N-well, P-well, and N+ form a typical SCR device in low-voltage CMOS processes [10,11]. In this design, the stacked diodes from I/O to V DD (D P1 and D P2 ) and from V SS to I/O (D N1 and D N2 ) perform the ESD current paths of I/O-to-V DD and V SS -to-I/O, respectively.…”
Section: Proposed Esd Protection Designmentioning
confidence: 99%
“…The LVTSCR ESD protection structure has improved electrical properties to effectively prevent ESD surge at a low voltage. The proposed LDO regulator has built in an LVTSCR-based ESD protection circuit to secure the high reliability of the IC circuit [18][19][20][21][22][23][24]. The proposed LDO regulator using the current driving buffer structure was secured reliably by applying ESD surge to POWER CLAMP and I/O CLAMP, and then the output voltage was verified.…”
Section: Introductionmentioning
confidence: 99%