Silicon‐selective epitaxial growth using ultrahigh vacuum CVD has been introduced into the LSI process for the first time. The gap between the oxide pattern and the epitaxial layer (facet width) is extremely small at 0.03 μm, allowing the selective epitaxial growth even for extremely fine active regions, which is suitable for device miniaturization. The leakage current in the source/drain and the device isolation are comparable to ordinary MOS using bulk silicon substrate, indicating the suppression of crystal defects. The short channel effect of the MOS transistor is extremely small, and a high transconductance Gm of 530 mS/mm has been obtained for NMOS transistors with extremely short and narrow channels (gate length 0.1 μm, gate width 0.3 μm). © 1998 Scripta Technica. Electron Comm Jpn Pt 2, 80(8): 46–52, 1997