Here, a broadband electrostatic discharge (ESD) protection circuit using area-efficient multi-layer helical inductors is presented. The proposed concept was verified in a 0.18 μm 1P6M CMOS process, and the circuit area is only 54 × 63 μm 2 . The measurement results show that a bandwidth of around 30 GHz is achieved, and the impedance matching is kept under -20 dB up to 40 GHz. The measured TLP and VF-TLP currents reach 2.19 and 5.80 A, respectively, which indicates a good ESD robustness.