Self-Organized Ge Nanospherical Gate/SiO₂/Si_0.15Ge_0.85–Nanosheet n-FETs Featuring High ON-OFF Drain Current Ratio

Abstract

We reported experimental fabrication and characterization of Si 0.15 Ge 0.85 n-MOSFETs comprising a gate-stacking heterostructure of Ge-nanospherical gate/SiO 2 /Si 0.15 Ge 0.85 -nanosheet on SOI (100) substrate in a self-organization approach. This unique gate-stacking heterostructure is simultaneously produced in a single oxidation step as a consequence of an exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials at 900 • C. Process-controlled tunability of nanospherical gate of 60-100 nm in diameter, gate oxide thickness of 3 nm, and Si 0.15 Ge 0.85 nanosheet with compressive strain of −2.5% was achieved. Superior gate modulation is evidenced by subthreshold slope of 150 mV/dec and I ON /I OFF > 5 × 10 8 (I OFF < 10 −6 μA/μm and I ON > 500 μA/μm) measured at V G = +1V, V D = +1 V, and T = 80 K for our device with channel length of 75 nm.INDEX TERMS Ge-gate, SiGe nanosheet, junctionless FET, self organization.

Ge nanodot-mediated densification and crystallization of low-pressure chemical vapor deposited Si3N4 for advanced complementary metal-oxide-semiconductor photonics and electronics applications

“…We have also observed the local densification and nanocrystallization of Si 3 N 4 layers being enhanced by the presence of larger Ge QDs and by longer thermal oxidation times. The local densification of Si 3 N 4 layers enabled by 'burrowing' Ge QDs and proximal Si layers has been demonstrated to improve gate leakage and to reduce interface-state density for the resulting Ge-QD/SiO 2 /SiGe MOSFETs [24,26]. We envisage further scientific exploration of this unique densification and nanocrystallization phenomena of Si 3 N 4 for boosting the performance of advanced electronic and photonic devices.…”

“…Based on the novel Ge QD migration through buffer layers of Si 3 N 4 and even Si, we have already fabricated self-organized, gate-stacking heterostructures of Ge QD/SiO 2 /SiGe-nanoshell over Si substrate in a single oxidation process, that is, via thermal oxidation of poly-SiGe nanopillars fabricated over a buffer layer of Si 3 N 4 on top of a Si substrate. High-performance Ge nanospherical-gate/SiO 2 /SiGe-recess channel MOSFETs featuring very large I ON >500 μA μm −1 in combination with extremely low I OFF <10 −6 μA μm −1 measured at V G =V D = +1 V [24]. Also high-responsivity (>3000 A W −1 at low optical power (<0.1 μW) for 400-1250 nm wavelength optical illumination) Ge QD/SiO 2 /SiGe-recess shell phototransistors [25] have been demonstrated based on these self-aligned gate-stacking structures.…”

“…Local densification of buffer Si 3 N 4 layers between the Ge spherical QDs and Si substrate has implications for novel MOS devices by significantly reducing the gate leakage as evidenced by low I G (<10 −13 A) measured on Ge nanospherical-gate/ SiO 2 /Si 0.15 Ge 0.85 -recess channel n-MOSFETs with L G =70 nm [24] as well as by having low interface-state densities (D it ) of 2-4×10 11 cm −2 eV −1 measured for MOS capacitors comprising of Ge QD/SiO 2 /SiGe-recess shell-channel gate stacks in parallel with Si 3 N 4 /Si channels [26]. For comparison, we have also prepared 'control' devices with a gate stack of SiO 2 /Si 3 N 4 / Si-channel (no Ge QDs above) following a postannealing process at 900 °C for 30 min.…”