Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231)
DOI: 10.1109/vtest.1998.670854
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Self-timed boundary-scan cells for multi-chip module test

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Cited by 2 publications
(1 citation statement)
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“…For instance, boundary scan cells can be included in the substrate design in order to make the final MCM self testable [2]. Not only active devices can be included at substrate level but resistors, capacitors and inductors [3], and up to four layers of interconnection lines are allowed so that power and ground planes can be manufactured.…”
Section: Introductionmentioning
confidence: 99%
“…For instance, boundary scan cells can be included in the substrate design in order to make the final MCM self testable [2]. Not only active devices can be included at substrate level but resistors, capacitors and inductors [3], and up to four layers of interconnection lines are allowed so that power and ground planes can be manufactured.…”
Section: Introductionmentioning
confidence: 99%