2019
DOI: 10.1109/tvlsi.2019.2920630
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Sensing Margin Enhancement Technique Utilizing Boosted Reference Voltage for Low-Voltage and High-Density DRAM

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Cited by 12 publications
(3 citation statements)
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“…Apart from the performance measurement of devices under development, FoM comparisons with other state-of-the-art market products are also considered. In general, the FoM assessment of NVM devices commonly focuses on basic characteristics in terms of operation speed, reliability, power consumption, scalability, and cost (Table 3) [15,[79][80][81][82][83][84][85][86][87][88][89]. Price ($/GB) <100k~10~1~1k~100k~100 10k…”
Section: Fom (Figure Of Merit) Of Memory Devicesmentioning
confidence: 99%
“…Apart from the performance measurement of devices under development, FoM comparisons with other state-of-the-art market products are also considered. In general, the FoM assessment of NVM devices commonly focuses on basic characteristics in terms of operation speed, reliability, power consumption, scalability, and cost (Table 3) [15,[79][80][81][82][83][84][85][86][87][88][89]. Price ($/GB) <100k~10~1~1k~100k~100 10k…”
Section: Fom (Figure Of Merit) Of Memory Devicesmentioning
confidence: 99%
“…Though other types of DRAM show advantages over 1T1C cell in read and write operations, the mostly used 1T1C cell has the smallest cell area, showing the best memory density compared to other DRAM cells [8]. With the significant growth in modern computing systems, DRAM has become a power/performance/energy bottleneck in data-intensive applications [9][10][11]. Power consumption is a major issue in low-power and portable devices.…”
Section: Introductionmentioning
confidence: 99%
“…As shown in Figure 1, a conventional sensing circuit of 1T1C DRAM is composed of an SA circuit, a precharge circuit, a write circuit, an isolation circuit and DRAM arrays [11,18]. In a typical SA circuit, the orange color part comprises two cross-coupled inverters, a PMOS and a NMOS transistor.…”
Section: Introductionmentioning
confidence: 99%